simplify source tree hierarchy: move files from sdram/ and ram/ to lib/

It's only three files. Also fix up all the paths (Gotta love included C files)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4661 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

3 files changed, 321 insertions, 0 deletions

diff --git a/src/lib/generic_dump_spd.c b/src/lib/generic_dump_spd.c
new file mode 100644
index 0000000000..2a71353b60
--- /dev/null
+++ b/src/lib/generic_dump_spd.c
@@ -0,0 +1,93 @@
+/*
+ * This code is derived from the Opteron boards' debug.c.
+ * It should go away either there or here, depending what fits better.
+ */
+
+static void dump_spd_registers(const struct mem_controller *ctrl)
+{
+	int i;
+	print_debug("\r\n");
+	for(i = 0; i < 4; i++) {
+		unsigned device;
+		device = ctrl->channel0[i];
+		if (device) {
+			int j;
+			print_debug("dimm: "); 
+			print_debug_hex8(i); 
+			print_debug(".0: ");
+			print_debug_hex8(device);
+			for(j = 0; j < 256; j++) {
+				int status;
+				unsigned char byte;
+				if ((j & 0xf) == 0) {
+					print_debug("\r\n");
+					print_debug_hex8(j);
+					print_debug(": ");
+				}
+				status = spd_read_byte(device, j);
+				if (status < 0) {
+					print_debug("bad device\r\n");
+					break;
+				}
+				byte = status & 0xff;
+				print_debug_hex8(byte);
+				print_debug_char(' ');
+			}
+			print_debug("\r\n");
+		}
+		device = ctrl->channel1[i];
+		if (device) {
+			int j;
+			print_debug("dimm: "); 
+			print_debug_hex8(i); 
+			print_debug(".1: ");
+			print_debug_hex8(device);
+			for(j = 0; j < 256; j++) {
+				int status;
+				unsigned char byte;
+				if ((j & 0xf) == 0) {
+					print_debug("\r\n");
+					print_debug_hex8(j);
+					print_debug(": ");
+				}
+				status = spd_read_byte(device, j);
+				if (status < 0) {
+					print_debug("bad device\r\n");
+					break;
+				}
+				byte = status & 0xff;
+				print_debug_hex8(byte);
+				print_debug_char(' ');
+			}
+			print_debug("\r\n");
+		}
+	}
+}
+
+#if 0
+void dump_spd_registers(void)
+{
+	unsigned device;
+	device = SMBUS_MEM_DEVICE_START;
+	printk_debug("\n");
+	while(device <= SMBUS_MEM_DEVICE_END) {
+		int status = 0;
+		int i;
+		printk_debug("dimm %02x", device);
+		for(i = 0; (i < 256) && (status == 0); i++) {
+			unsigned char byte;
+			if ((i % 20) == 0) {
+				printk_debug("\n%3d: ", i);
+			}
+			status = smbus_read_byte(device, i, &byte);
+			if (status != 0) {
+				printk_debug("bad device\n");
+				continue;
+			}
+			printk_debug("%02x ", byte);
+		}
+		device += SMBUS_MEM_DEVICE_INC;
+		printk_debug("\n");
+	}
+}
+#endif
diff --git a/src/lib/generic_sdram.c b/src/lib/generic_sdram.c
new file mode 100644
index 0000000000..cdb06cd73f
--- /dev/null
+++ b/src/lib/generic_sdram.c
@@ -0,0 +1,67 @@
+
+#ifndef RAMINIT_SYSINFO
+        #define RAMINIT_SYSINFO 0
+#endif
+
+static inline void print_debug_sdram_8(const char *strval, uint32_t val)
+{
+#if CONFIG_USE_INIT
+        printk_debug("%s%02x\r\n", strval, val);
+#else
+        print_debug(strval); print_debug_hex8(val); print_debug("\r\n");
+#endif
+}
+
+void sdram_no_memory(void)
+{
+	print_err("No memory!!\r\n");
+	while(1) { 
+		hlt(); 
+	}
+}
+
+/* Setup SDRAM */
+#if RAMINIT_SYSINFO == 1
+void sdram_initialize(int controllers, const struct mem_controller *ctrl, void *sysinfo)
+#else
+void sdram_initialize(int controllers, const struct mem_controller *ctrl)
+#endif
+{
+	int i;
+	/* Set the registers we can set once to reasonable values */
+	for(i = 0; i < controllers; i++) {
+		print_debug_sdram_8("Ram1.",i);
+
+	#if RAMINIT_SYSINFO == 1
+		sdram_set_registers(ctrl + i , sysinfo);
+	#else
+		sdram_set_registers(ctrl + i);
+	#endif
+	}
+
+	/* Now setup those things we can auto detect */
+	for(i = 0; i < controllers; i++) {
+                print_debug_sdram_8("Ram2.",i);
+
+	#if RAMINIT_SYSINFO == 1
+		sdram_set_spd_registers(ctrl + i , sysinfo);
+	#else
+                sdram_set_spd_registers(ctrl + i);
+	#endif
+
+	}
+
+	/* Now that everything is setup enable the SDRAM.
+	 * Some chipsets do the work for us while on others 
+	 * we need to it by hand.
+	 */
+	print_debug("Ram3\r\n");
+
+	#if RAMINIT_SYSINFO == 1
+	sdram_enable(controllers, ctrl, sysinfo);
+	#else
+	sdram_enable(controllers, ctrl);
+	#endif
+
+	print_debug("Ram4\r\n");
+}
diff --git a/src/lib/ramtest.c b/src/lib/ramtest.c
new file mode 100644
index 0000000000..9f329ef51b
--- /dev/null
+++ b/src/lib/ramtest.c
@@ -0,0 +1,161 @@
+static void write_phys(unsigned long addr, unsigned long value)
+{
+#if CONFIG_HAVE_MOVNTI
+	asm volatile(
+		"movnti %1, (%0)"
+		: /* outputs */
+		: "r" (addr), "r" (value) /* inputs */
+#ifndef __GNUC__
+		: /* clobbers */
+#endif
+		);
+#else
+	volatile unsigned long *ptr;
+	ptr = (void *)addr;
+	*ptr = value;
+#endif
+}
+
+static unsigned long read_phys(unsigned long addr)
+{
+	volatile unsigned long *ptr;
+	ptr = (void *)addr;
+	return *ptr;
+}
+
+static void ram_fill(unsigned long start, unsigned long stop)
+{
+	unsigned long addr;
+	/* 
+	 * Fill.
+	 */
+#if CONFIG_USE_PRINTK_IN_CAR
+	printk_debug("DRAM fill: 0x%08x-0x%08x\r\n", start, stop);
+#else
+	print_debug("DRAM fill: ");
+	print_debug_hex32(start);
+	print_debug("-");
+	print_debug_hex32(stop);
+	print_debug("\r\n");
+#endif
+	for(addr = start; addr < stop ; addr += 4) {
+		/* Display address being filled */
+		if (!(addr & 0xfffff)) {
+#if CONFIG_USE_PRINTK_IN_CAR
+			printk_debug("%08x \r", addr);
+#else
+			print_debug_hex32(addr);
+			print_debug(" \r");
+#endif
+		}
+		write_phys(addr, addr);
+	};
+	/* Display final address */
+#if CONFIG_USE_PRINTK_IN_CAR
+	printk_debug("%08x\r\nDRAM filled\r\n", addr);
+#else
+	print_debug_hex32(addr);
+	print_debug("\r\nDRAM filled\r\n");
+#endif
+}
+
+static void ram_verify(unsigned long start, unsigned long stop)
+{
+	unsigned long addr;
+	int i = 0;
+	/* 
+	 * Verify.
+	 */
+#if CONFIG_USE_PRINTK_IN_CAR
+	printk_debug("DRAM verify: 0x%08x-0x%08x\r\n", start, stop);
+#else
+	print_debug("DRAM verify: ");
+	print_debug_hex32(start);
+	print_debug_char('-');
+	print_debug_hex32(stop);
+	print_debug("\r\n");
+#endif
+	for(addr = start; addr < stop ; addr += 4) {
+		unsigned long value;
+		/* Display address being tested */
+		if (!(addr & 0xfffff)) {
+#if CONFIG_USE_PRINTK_IN_CAR
+			printk_debug("%08x \r", addr);
+#else
+			print_debug_hex32(addr);
+			print_debug(" \r");
+#endif
+		}
+		value = read_phys(addr);
+		if (value != addr) {
+			/* Display address with error */
+#if CONFIG_USE_PRINTK_IN_CAR
+			printk_err("Fail: @0x%08x Read value=0x%08x\r\n", addr, value);
+#else
+			print_err("Fail: @0x");
+			print_err_hex32(addr);
+			print_err(" Read value=0x");
+			print_err_hex32(value);
+			print_err("\r\n");
+#endif
+			i++;
+			if(i>256) {
+#if CONFIG_USE_PRINTK_IN_CAR
+				printk_debug("Aborting.\n\r");
+#else
+				print_debug("Aborting.\n\r");
+#endif
+				break;
+			}
+		}
+	}
+	/* Display final address */
+#if CONFIG_USE_PRINTK_IN_CAR
+	printk_debug("%08x", addr);
+#else
+	print_debug_hex32(addr);
+#endif
+
+	if (i) {
+#if CONFIG_USE_PRINTK_IN_CAR
+		printk_debug("\r\nDRAM did _NOT_ verify!\r\n");
+#else
+		print_debug("\r\nDRAM did _NOT_ verify!\r\n");
+#endif
+		die("DRAM ERROR");
+	}
+	else {
+#if CONFIG_USE_PRINTK_IN_CAR
+		printk_debug("\r\nDRAM range verified.\r\n");
+#else
+		print_debug("\r\nDRAM range verified.\r\n");
+#endif
+	}
+}
+
+
+void ram_check(unsigned long start, unsigned long stop)
+{
+	/*
+	 * This is much more of a "Is my DRAM properly configured?"
+	 * test than a "Is my DRAM faulty?" test.  Not all bits
+	 * are tested.   -Tyson
+	 */
+#if CONFIG_USE_PRINTK_IN_CAR
+	printk_debug("Testing DRAM : %08x - %08x\r\n", start, stop);
+#else
+	print_debug("Testing DRAM : ");
+	print_debug_hex32(start);
+	print_debug("-");	
+	print_debug_hex32(stop);
+	print_debug("\r\n");
+#endif
+	ram_fill(start, stop);
+	ram_verify(start, stop);
+#if CONFIG_USE_PRINTK_IN_CAR
+	printk_debug("Done.\r\n");
+#else
+	print_debug("Done.\r\n");
+#endif
+}
+