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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-01-30 15:45:16 +0200 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-03-04 15:34:27 +0100 |
commit | bea6bf07dfd9b97ad81fb7433464a9f61ff02105 (patch) | |
tree | 10b6a471dcf8e63e313f3a0763316417b43649c5 /src/lib | |
parent | 2b95da01e6bbdd8b001fa1ff2830dbaa70f14c3e (diff) |
uart8250: Move under drivers/uart
Change-Id: Ic65ffaaa092330ed68d891e4a09a8b86cdc04a3a
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/5236
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/lib')
-rw-r--r-- | src/lib/Makefile.inc | 6 | ||||
-rw-r--r-- | src/lib/uart8250.c | 131 | ||||
-rw-r--r-- | src/lib/uart8250mem.c | 133 |
3 files changed, 0 insertions, 270 deletions
diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index cb75dbf747..f2b0fe3297 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -46,8 +46,6 @@ romstage-y += cbfs.c romstage-$(CONFIG_COMPRESS_RAMSTAGE) += lzma.c #romstage-y += lzmadecode.c romstage-$(CONFIG_CACHE_AS_RAM) += ramtest.c -romstage-$(CONFIG_CONSOLE_SERIAL8250) += uart8250.c -romstage-$(CONFIG_CONSOLE_SERIAL8250MEM) += uart8250mem.c ifeq ($(CONFIG_EARLY_CBMEM_INIT),y) romstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c @@ -88,8 +86,6 @@ ramstage-y += stack.c ramstage-$(CONFIG_ARCH_X86) += gcc.c ramstage-y += clog2.c romstage-y += clog2.c -ramstage-$(CONFIG_CONSOLE_SERIAL8250) += uart8250.c -ramstage-$(CONFIG_CONSOLE_SERIAL8250MEM) += uart8250mem.c ramstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c ramstage-$(CONFIG_BOOTSPLASH) += jpeg.c ramstage-$(CONFIG_TRACE) += trace.c @@ -126,8 +122,6 @@ ifneq ($(CONFIG_HAVE_ARCH_MEMMOVE),y) smm-y += memmove.c endif smm-y += cbfs.c memcmp.c -smm-$(CONFIG_CONSOLE_SERIAL8250) += uart8250.c -smm-$(CONFIG_CONSOLE_SERIAL8250MEM) += uart8250mem.c smm-y += gcc.c $(obj)/lib/version.ramstage.o : $(obj)/build.h diff --git a/src/lib/uart8250.c b/src/lib/uart8250.c deleted file mode 100644 index 8e1714d190..0000000000 --- a/src/lib/uart8250.c +++ /dev/null @@ -1,131 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2003 Eric Biederman - * Copyright (C) 2006-2010 coresystems GmbH - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <arch/io.h> -#include <console/uart.h> -#include <uart8250.h> -#include <trace.h> - -/* Should support 8250, 16450, 16550, 16550A type UARTs */ - -/* Nominal values only, good for the range of choices Kconfig offers for - * set of standard baudrates. - */ -#define BAUDRATE_REFCLK (115200) -#define BAUDRATE_OVERSAMPLE (1) - -/* Expected character delay at 1200bps is 9ms for a working UART - * and no flow-control. Assume UART as stuck if shift register - * or FIFO takes more than 50ms per character to appear empty. - * - * Estimated that inb() from UART takes 1 microsecond. - */ -#define SINGLE_CHAR_TIMEOUT (50 * 1000) -#define FIFO_TIMEOUT (16 * SINGLE_CHAR_TIMEOUT) - -static int uart8250_can_tx_byte(unsigned base_port) -{ - return inb(base_port + UART_LSR) & UART_LSR_THRE; -} - -static void uart8250_tx_byte(unsigned base_port, unsigned char data) -{ - unsigned long int i = SINGLE_CHAR_TIMEOUT; - while (i-- && !uart8250_can_tx_byte(base_port)); - outb(data, base_port + UART_TBR); -} - -static void uart8250_tx_flush(unsigned base_port) -{ - unsigned long int i = FIFO_TIMEOUT; - while (i-- && !(inb(base_port + UART_LSR) & UART_LSR_TEMT)); -} - -static int uart8250_can_rx_byte(unsigned base_port) -{ - return inb(base_port + UART_LSR) & UART_LSR_DR; -} - -static unsigned char uart8250_rx_byte(unsigned base_port) -{ - unsigned long int i = SINGLE_CHAR_TIMEOUT; - while (i-- && !uart8250_can_rx_byte(base_port)); - - if (i) - return inb(base_port + UART_RBR); - else - return 0x0; -} - -static void uart8250_init(unsigned base_port, unsigned divisor) -{ - DISABLE_TRACE; - /* Disable interrupts */ - outb(0x0, base_port + UART_IER); - /* Enable FIFOs */ - outb(UART_FCR_FIFO_EN, base_port + UART_FCR); - - /* assert DTR and RTS so the other end is happy */ - outb(UART_MCR_DTR | UART_MCR_RTS, base_port + UART_MCR); - - /* DLAB on */ - outb(UART_LCR_DLAB | CONFIG_TTYS0_LCS, base_port + UART_LCR); - - /* Set Baud Rate Divisor. 12 ==> 9600 Baud */ - outb(divisor & 0xFF, base_port + UART_DLL); - outb((divisor >> 8) & 0xFF, base_port + UART_DLM); - - /* Set to 3 for 8N1 */ - outb(CONFIG_TTYS0_LCS, base_port + UART_LCR); - ENABLE_TRACE; -} - -/* FIXME: Needs uart index from Kconfig. - * Already use array as a work-around for ROMCC. - */ -static const unsigned bases[1] = { CONFIG_TTYS0_BASE }; - -void uart_init(void) -{ - unsigned int div; - div = uart_baudrate_divisor(default_baudrate(), BAUDRATE_REFCLK, - BAUDRATE_OVERSAMPLE); - uart8250_init(bases[0], div); -} - -void uart_tx_byte(unsigned char data) -{ - uart8250_tx_byte(bases[0], data); -} - -unsigned char uart_rx_byte(void) -{ - return uart8250_rx_byte(bases[0]); -} - -int uart_can_rx_byte(void) -{ - return uart8250_can_rx_byte(bases[0]); -} - -void uart_tx_flush(void) -{ - uart8250_tx_flush(bases[0]); -} diff --git a/src/lib/uart8250mem.c b/src/lib/uart8250mem.c deleted file mode 100644 index ce45de9c10..0000000000 --- a/src/lib/uart8250mem.c +++ /dev/null @@ -1,133 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2003 Eric Biederman - * Copyright (C) 2006-2010 coresystems GmbH - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <arch/io.h> -#include <console/uart.h> -#include <uart8250.h> -#include <device/device.h> -#include <delay.h> - -/* Should support 8250, 16450, 16550, 16550A type UARTs */ - -/* Expected character delay at 1200bps is 9ms for a working UART - * and no flow-control. Assume UART as stuck if shift register - * or FIFO takes more than 50ms per character to appear empty. - */ -#define SINGLE_CHAR_TIMEOUT (50 * 1000) -#define FIFO_TIMEOUT (16 * SINGLE_CHAR_TIMEOUT) - -static int uart8250_mem_can_tx_byte(unsigned base_port) -{ - return read8(base_port + UART_LSR) & UART_LSR_THRE; -} - -static void uart8250_mem_tx_byte(unsigned base_port, unsigned char data) -{ - unsigned long int i = SINGLE_CHAR_TIMEOUT; - while(i-- && !uart8250_mem_can_tx_byte(base_port)) - udelay(1); - write8(base_port + UART_TBR, data); -} - -static void uart8250_mem_tx_flush(unsigned base_port) -{ - unsigned long int i = FIFO_TIMEOUT; - while(i-- && !(read8(base_port + UART_LSR) & UART_LSR_TEMT)) - udelay(1); -} - -static int uart8250_mem_can_rx_byte(unsigned base_port) -{ - return read8(base_port + UART_LSR) & UART_LSR_DR; -} - -static unsigned char uart8250_mem_rx_byte(unsigned base_port) -{ - unsigned long int i = SINGLE_CHAR_TIMEOUT; - while(i-- && !uart8250_mem_can_rx_byte(base_port)) - udelay(1); - if (i) - return read8(base_port + UART_RBR); - else - return 0x0; -} - -static void uart8250_mem_init(unsigned base_port, unsigned divisor) -{ - /* Disable interrupts */ - write8(base_port + UART_IER, 0x0); - /* Enable FIFOs */ - write8(base_port + UART_FCR, UART_FCR_FIFO_EN); - - /* Assert DTR and RTS so the other end is happy */ - write8(base_port + UART_MCR, UART_MCR_DTR | UART_MCR_RTS); - - /* DLAB on */ - write8(base_port + UART_LCR, UART_LCR_DLAB | CONFIG_TTYS0_LCS); - - write8(base_port + UART_DLL, divisor & 0xFF); - write8(base_port + UART_DLM, (divisor >> 8) & 0xFF); - - /* Set to 3 for 8N1 */ - write8(base_port + UART_LCR, CONFIG_TTYS0_LCS); -} - -void uart_init(void) -{ - u32 base = uart_platform_base(0); - if (!base) - return; - - unsigned int div; - div = uart_baudrate_divisor(default_baudrate(), uart_platform_refclk(), 16); - uart8250_mem_init(base, div); -} - -void uart_tx_byte(unsigned char data) -{ - u32 base = uart_platform_base(0); - if (!base) - return; - uart8250_mem_tx_byte(base, data); -} - -unsigned char uart_rx_byte(void) -{ - u32 base = uart_platform_base(0); - if (!base) - return 0xff; - return uart8250_mem_rx_byte(base); -} - -int uart_can_rx_byte(void) -{ - u32 base = uart_platform_base(0); - if (!base) - return 0; - return uart8250_mem_can_rx_byte(base); -} - -void uart_tx_flush(void) -{ - u32 base = uart_platform_base(0); - if (!base) - return; - uart8250_mem_tx_flush(base); -} |