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authorMAULIK V VAGHELA <maulik.v.vaghela@intel.com>2021-11-25 14:46:23 +0530
committerFelix Held <felix-coreboot@felixheld.de>2021-12-13 13:58:05 +0000
commitf0a03b374a64d99b0e9a790b372db2e656293c90 (patch)
treeaac12e00aab4a378f75b748abf528648c4ba5ad5 /src/lib/uuid.c
parenta70288d9fc60416d828a724fd1f2e871bd9cc129 (diff)
soc/intel/alderlake: Implement function to map physical port to EC port
Currently coreboot and EC had different logic to interpret TCSS port number which would break retimer update functionality since coreboot would pass wrong port information to EC. To correct this, coreboot has implemented function which converts coreboot physical port mapping to EC's abstract port mapping. Each SoC needs to implement this weak function since only SoC will have correct physical port mapping data. This function should resolve issue of port mismatch since coreboot will count only enabled ports and provide correct EC port number in return. BUG=b:207057940 BRANCH=None TEST=Check if retimer update works on Redrix and correct port information is passed to EC. Change-Id: I3735b7c7794b46123aba3beac8c0268ce72d658c Signed-off-by: MAULIK V VAGHELA <maulik.v.vaghela@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59666 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/lib/uuid.c')
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