diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2017-01-10 17:44:42 -0600 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-01-12 18:28:12 +0100 |
| commit | f56c7787ba34bf9ee7799a77803c1a77b2d1be27 (patch) | |
| tree | 06b5ad1ec634f61662b7fe52303b3c849506d7ca /src/lib/tpm2_tlcl_structures.h | |
| parent | 17b66c384618c52185fa1ca9ef84101e84b0f4be (diff) | |
google/chromeos: disable platform hierarchy on resume for TPM2
On Chrome OS devices that use TPM2 parts the platform hierarchy
is disabled by the boot loader, depthcharge. Since the bootloader
isn't involved in resuming a suspended machine there's no equivalent
action in coreboot to disable the platform hierarchy. Therefore, to
ensure consistent state in resume the platform hierarchy in the TPM2
needs to be disabled as well. For systems that resume using the
firmware the platform hierarchy is disabled when utilizing
TPM2 devices.
BUG=chrome-os-partner:61097
BRANCH=reef
TEST=Suspend and resume. Confirmed 'stop trunksd; tpmc getvf; start
trunksd' shows that phEnable is 0.
Change-Id: I060252f338c8fd68389273224ee58caa99881de8
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/18096
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/lib/tpm2_tlcl_structures.h')
| -rw-r--r-- | src/lib/tpm2_tlcl_structures.h | 26 |
1 files changed, 16 insertions, 10 deletions
diff --git a/src/lib/tpm2_tlcl_structures.h b/src/lib/tpm2_tlcl_structures.h index 36a3e8b253..c5c6d87985 100644 --- a/src/lib/tpm2_tlcl_structures.h +++ b/src/lib/tpm2_tlcl_structures.h @@ -28,7 +28,7 @@ typedef uint8_t TPMI_YES_NO; typedef TPM_ALG_ID TPMI_ALG_HASH; typedef TPM_HANDLE TPMI_DH_PCR; typedef TPM_HANDLE TPMI_RH_NV_INDEX; -typedef TPM_HANDLE TPMI_RH_PROVISION; +typedef TPM_HANDLE TPMI_RH_ENABLES; typedef TPM_HANDLE TPMI_SH_AUTH_SESSION; typedef TPM_HANDLE TPM_RH; @@ -59,15 +59,16 @@ struct tpm_header { } __attribute__((packed)); /* TPM command codes. */ -#define TPM2_Clear ((TPM_CC)0x00000126) -#define TPM2_NV_DefineSpace ((TPM_CC)0x0000012A) -#define TPM2_NV_Write ((TPM_CC)0x00000137) -#define TPM2_NV_WriteLock ((TPM_CC)0x00000138) -#define TPM2_SelfTest ((TPM_CC)0x00000143) -#define TPM2_Startup ((TPM_CC)0x00000144) -#define TPM2_NV_Read ((TPM_CC)0x0000014E) -#define TPM2_GetCapability ((TPM_CC)0x0000017A) -#define TPM2_PCR_Extend ((TPM_CC)0x00000182) +#define TPM2_Hierarchy_Control ((TPM_CC)0x00000121) +#define TPM2_Clear ((TPM_CC)0x00000126) +#define TPM2_NV_DefineSpace ((TPM_CC)0x0000012A) +#define TPM2_NV_Write ((TPM_CC)0x00000137) +#define TPM2_NV_WriteLock ((TPM_CC)0x00000138) +#define TPM2_SelfTest ((TPM_CC)0x00000143) +#define TPM2_Startup ((TPM_CC)0x00000144) +#define TPM2_NV_Read ((TPM_CC)0x0000014E) +#define TPM2_GetCapability ((TPM_CC)0x0000017A) +#define TPM2_PCR_Extend ((TPM_CC)0x00000182) /* Startup values. */ #define TPM_SU_CLEAR 0 @@ -334,4 +335,9 @@ struct tpm2_pcr_extend_cmd { TPML_DIGEST_VALUES digests; }; +struct tpm2_hierarchy_control_cmd { + TPMI_RH_ENABLES enable; + TPMI_YES_NO state; +}; + #endif // __SRC_LIB_TPM2_TLCL_STRUCTURES_H |