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authorChiranjeevi Rapolu <chiranjeevi.rapolu@intel.com>2016-08-03 14:09:33 -0700
committerDuncan Laurie <dlaurie@chromium.org>2016-08-05 18:02:50 +0200
commit44d0ddcc817708403068893a5b4f72454deea355 (patch)
tree964e7f21d63d203942732710b75b4c462b6ae5eb /src/lib/tpm2_tlcl_structures.h
parentd924fac75942db4362af5dd026ef2b0768ffb5ce (diff)
google/reef: Correct SD card pins config
SD CLK and CLK_FB needs to be pulled down by 20K. SD CD_N is active LOW, needs to be pulled up by 20K SD WP pin is not connected for uSD cards, enable writes by default by pulling low by 20K. BUG=chrome-os-partner:54866 BRANCH=None TEST=Test with uSD cards. Change-Id: Ia4bbd966ffb21e276dfc31a74f4ea54718900d66 Signed-off-by: Chiranjeevi Rapolu <chiranjeevi.rapolu@intel.com> Reviewed-on: https://review.coreboot.org/16057 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/lib/tpm2_tlcl_structures.h')
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