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authorVadim Bendebury <vbendeb@chromium.org>2017-03-22 16:01:53 -0700
committerVadim Bendebury <vbendeb@chromium.org>2017-03-23 23:49:58 +0100
commit021ec2819b2200eabbaca5b6873f7024c2bd9434 (patch)
tree2c4b65ed7901b30495d373961b208dfedb8e3842 /src/lib/tpm2_tlcl.c
parentc5168832cd5e8a052e835cbbfa702f0d5649a98c (diff)
cr50: add unmarshaling of vendor commands and process 'enable_update'
The upcoming Cr50 firmware changes will require the AP to enable the previously downloaded Cr50 firmware update(s). A new vendor command (TPM2_CR50_SUB_CMD_TURN_UPDATE_ON) is used for that. The command accepts one parameter - a timeout value in range of 0 to 1000 ms. When processing the command the Cr50 checks if the alternative RO or RW image(s) need to be enabled, and if so - enables them and returns to the host the number of enabled headers. If the vendor command requested a non-zero timeout, the Cr50 starts a timer to trigger system reboot after the requested timeout expires. The host acts on the number of enabled headers - if the number is nonzero, the host prepares the device to be reset and waits for the Cr50 to reboot the device after timeout expires. This patch also adds more formal vendor command marshaling/unmarshaling to make future additions easier. BRANCH=gru,reef BUG=b:35580805 TEST=with the actual user of this code in the next patch verified that the cr50 update is enabled as expected. Change-Id: Ic76d384d637c0eeaad206e0a8242cbb8e2b19b37 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://review.coreboot.org/18945 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/lib/tpm2_tlcl.c')
-rw-r--r--src/lib/tpm2_tlcl.c19
1 files changed, 19 insertions, 0 deletions
diff --git a/src/lib/tpm2_tlcl.c b/src/lib/tpm2_tlcl.c
index 967612ad20..1118afb1df 100644
--- a/src/lib/tpm2_tlcl.c
+++ b/src/lib/tpm2_tlcl.c
@@ -406,3 +406,22 @@ uint32_t tlcl_cr50_enable_nvcommits(void)
}
return TPM_SUCCESS;
}
+
+uint32_t tlcl_cr50_enable_update(uint16_t timeout_ms,
+ uint8_t *num_restored_headers)
+{
+ struct tpm2_response *response;
+ uint16_t command_body[] = {
+ TPM2_CR50_SUB_CMD_TURN_UPDATE_ON, timeout_ms
+ };
+
+ printk(BIOS_INFO, "Checking cr50 for pending updates\n");
+
+ response = tpm_process_command(TPM2_CR50_VENDOR_COMMAND, command_body);
+
+ if (!response || response->hdr.tpm_code)
+ return TPM_E_INTERNAL_INCONSISTENCY;
+
+ *num_restored_headers = response->vcr.num_restored_headers;
+ return TPM_SUCCESS;
+}