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authorTeo Boon Tiong <boon.tiong.teo@intel.com>2017-09-07 00:48:55 +0800
committerDuncan Laurie <dlaurie@chromium.org>2017-12-19 15:36:48 +0000
commit4dee7b528d3d85ffcca9b7f1fe02959e4113e106 (patch)
treeaa749395e82efd059383c3b5f27359afa297c72e /src/lib/tlcl_structures.h
parent08bea22c246fe4ad181a8992f86100e9249404ae (diff)
mainboard/intel/saddlebrook: add support for Saddle Brook
Add initial files to support the Saddle Brook board. This board uses the Skylake FSP 1.1 image and does not build without the FspUpdVpd.h file. Most of the code has been taken carried over from kunimitsu with changes done for Saddle Brook. Saddle Brook is a reference board for Skylake SOC and has DDR4. TEST=Build with uefi payload and boot to Linux 4.9 on CRB successfully. Change-Id: Ie221eb58e8ab8ff15e9ef19c1d145a5eb2921b4e Signed-off-by: Anuj Mittal <anujx.mittal@intel.com> Signed-off-by: Teo Boon Tiong <boon.tiong.teo@intel.com> Reviewed-on: https://review.coreboot.org/21436 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
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