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| author | Shunqian Zheng <zhengsq@rock-chips.com> | 2016-05-17 14:00:04 +0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-07-12 00:28:33 +0200 |
| commit | 74bb41275326cd34046454ab5a06bd7a17d5f887 (patch) | |
| tree | 58757d2d15ffd8bbc2853ac577f1d94d44e7ee37 /src/lib/tlcl.c | |
| parent | 5d49b4a4bcbc878256dac40ef834e07ea7101673 (diff) | |
rockchip/rk3399: Fix pinctrl pull bias settings
The pull bias settings for GPIO0_A, GPIO0_B, GPIO2_C and GPIO2_D
are different from the other GPIO banks.
This patch adds a callback function to get the GPIO pull value
of each SoC(rk3288 and rk3399) so we can still use the common
GPIO driver.
BRANCH=none
BUG=chrome-os-partner:53251
TEST=Jerry and Gru still boot
Change-Id: I2a00b7ffd2699190582f5f50a1e21b61c500bf4f
Signed-off-by: Martin Roth <martinroth@chromium.org>
Original-Commit-Id: 46d5fa7297693216a2da9bcf15ccce4af796e80e
Original-Change-Id: If53f47181bdc235a1ccfefeeb2a77e0eb0e3b1ca
Original-Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/358110
Original-Commit-Ready: Julius Werner <jwerner@chromium.org>
Original-Tested-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/15587
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/lib/tlcl.c')
0 files changed, 0 insertions, 0 deletions