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authorShuo Liu <shuo.liu@intel.com>2024-05-07 23:15:29 +0800
committerLean Sheng Tan <sheng.tan@9elements.com>2024-08-29 20:12:24 +0000
commit5e521d7e623df9dd30d2b073a838e419b3d29904 (patch)
tree07730c67078297e0f26a238d86e1146d13066d7f /src/lib/timer.c
parentf373188e6492d59418f25d7090ea1d5ec7ef0f26 (diff)
soc/intel/xeon_sp: Add PCIe root port driver
The driver sets ACPI names for PCIe root ports and its subordinate devices, and fill SSDT for them accordingly. SPR PCIe root port devices are initially supported. TEST=Build and boot on intel/archercity CRB Change-Id: I81bd5d5a2e62301543a332162a5a789e0793e18e Signed-off-by: Shuo Liu <shuo.liu@intel.com> Signed-off-by: Jincheng Li <jincheng.li@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81567 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
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