diff options
| author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2022-08-16 14:29:01 -0600 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2022-08-24 21:28:39 +0000 |
| commit | 932783daf83e67f8838c20c5f5275782c9c28169 (patch) | |
| tree | 719eac3920ddcc298c10430927fe3461dcf57b83 /src/lib/spd_cache.c | |
| parent | a1cc78096fc9be98449f66b165281c4f8a52fdc5 (diff) | |
mb/google/brya/var/agah: Update GPU GPIOs
Converge as many of the GPU's GPIOs to use PLTRST# as the reset signal
explicitly, as the hardware engineers requested this.
BUG=none
TEST=boot and reboot agah, dGPU still visible on PCIe bus
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: I78e58eb17cadc95083571affbecb4e1ce0adf16a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66809
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/lib/spd_cache.c')
0 files changed, 0 insertions, 0 deletions