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authorMatt DeVillier <matt.devillier@amd.corp-partner.google.com>2022-08-22 17:07:58 -0500
committerMartin Roth <martin.roth@amd.corp-partner.google.com>2022-08-24 15:14:15 +0000
commitd77525b5bd28011a56194fcb5f8f77bc709dd039 (patch)
tree63ad3627c84692456e7c502a0f6026d60b1475a3 /src/lib/ramdetect.c
parent93447c42a8349565530bffd47bf5c0214f22d690 (diff)
vc/amd/fsp/mendocino: Update DMI_T17_MEMORY_TYPE
Synchronize with AGESA/AgesaModulePkg/Include/MemDmi.h. Add/correct values for DDR5, LPDDR5, LPDDR5X. BUG=b:239000826 TEST=Build and verify with other patches in train Change-Id: I127f21bfe2dfcd7794eb543185ea3fb362ff3914 Signed-off-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/66952 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/lib/ramdetect.c')
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