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authorLijian Zhao <lijian.zhao@intel.com>2019-01-15 19:06:09 -0800
committerPatrick Georgi <pgeorgi@google.com>2019-01-17 13:03:13 +0000
commit82b8c3d1b025af5076f769d7754b7e1ae6bf5950 (patch)
treee7f8676b312345f6a707a8f41aed23bc1cc04fdf /src/lib/memcpy.c
parentd1215269a7bc9b3df82548a7ebdb0e468b18e1df (diff)
soc/intel/icelake: Fix AG3E programming in PMC
According to EDS #571034 4.3.2, GEN_PMCON_A stays in pmc mmio mapped register but not pci configuration spaces, hence change the programming method in icelake pmc driver. Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Change-Id: I29883b50cdca99b45f5362f78cbee32beaa669f7 Reviewed-on: https://review.coreboot.org/c/30947 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/lib/memcpy.c')
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