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| author | Julian Schroeder <julianmarcusschroeder@gmail.com> | 2021-07-09 16:10:08 -0500 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-07-15 21:39:04 +0000 |
| commit | 577e146895d489d809b4d41da7f6f2d7428143a2 (patch) | |
| tree | 963579f26d4c4d179ad797c3ed1fb48f9b0048a6 /src/lib/malloc.c | |
| parent | 82e2f3229ea752f76deeba3b3c511a53906e6acc (diff) | |
soc/amd/cezanne: add ACPI CPPC support for AMD
This leverages the existing Collaborative Processor Performance Control
(CPPC) support and adds CPPC init for AMD/Cezanne.
BUG=b:185814875
TEST=under Linux/ChromeOS, acpidump ssdt2, find expected CPPC entries
Signed-off-by: Julian Schroeder <julianmarcusschroeder@gmail.com>
Change-Id: I94172f40c7fa4b7b89237fd382448e598da00fbb
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56188
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/lib/malloc.c')
0 files changed, 0 insertions, 0 deletions