diff options
| author | Maxim Polyakov <max.senia.poliak@gmail.com> | 2019-08-22 13:11:32 +0300 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-09-06 15:32:33 +0000 |
| commit | 571d07d45b51d1b20af29cad27390b83b82f0aba (patch) | |
| tree | 58736ae41333c3b732d20ebfcb549a551b3a803e /src/lib/malloc.c | |
| parent | aa771cb19f0ff1b02ac2e9732312b34bd2b2f0b3 (diff) | |
soc/intel/skylake: Add Lewisburg family PCH support
This patch adds Lewisburg C62x Series PCH support by adding the
Production and Super SKUs of the following PCI devices:
- LPC or eSPI Controllers,
- PCI Express Root Ports,
- SSATA and SATA Controllers,
- SMBus,
- SPI Controller,
- ME/HECI,
- Audio,
- P2SB,
- Power Management Controller.
These changes are in accordance with the documentation:
[*] page 39, Intel(R) C620 Series Chipset Platform Controller Hub
(PCH) Datasheet, May 2019. Document Number: 336067-007US
Change-Id: I7eaf2c1bb725ffed66f86c023c415ad17fe5793d
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35030
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lance Zhao <lance.zhao@gmail.com>
Diffstat (limited to 'src/lib/malloc.c')
0 files changed, 0 insertions, 0 deletions