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authorSean Rhodes <sean@starlabs.systems>2024-01-10 20:38:05 +0000
committerFelix Held <felix-coreboot@felixheld.de>2024-02-05 14:09:05 +0000
commit7201602a18b63fc5236f025d22dc726637866cb6 (patch)
tree8372888b3a67a576d7a82e7f7ea3f1601817d37f /src/lib/libgcc.c
parent4f43b0e7adb7f4699bae7b9a2f2fac2e797e9c4c (diff)
soc/intel/common/tcss: Guard disabling MUX with TCSS_HAS_USBC_OPS
Currently, SOC_INTEL_COMMON_BLOCK_TCSS will set MUX to disabled. The two related options to re-configure it for either USB devices or displays, are currently only supported by the ChromeEC. As such, any device without the ChromeEC will boot with attached USB-C devices in a non-functional state. Add TCSS_HAS_USBC_OPS to make this feature configurable, and set the default to enabled if the board features the ChromeEC. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Ia848668ae9af4637fc7cffec9eb694f29d7deba9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/79882 Reviewed-by: Kapil Porwal <kapilporwal@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Diffstat (limited to 'src/lib/libgcc.c')
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