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authorShaunak Saha <shaunak.saha@intel.com>2016-06-07 02:06:28 -0700
committerAaron Durbin <adurbin@chromium.org>2016-07-02 03:30:28 +0200
commit5b6c5a500ed416f033a22eed1d8174063ebaf143 (patch)
tree6dca69cee7e72887a48579c25f58141713dfc58a /src/lib/imd.c
parent0b806285a7819397a5fede24cfdcf7c09d0caa1c (diff)
soc/intel/apollolake: Add GPE routing code
This patch adds the basic framework for SCI to GPE routing code. BUG = chrome-os-partner:53438 TEST = Toogle pch_sci_l from ec console using gpioset command and see that the sci counter increases in /sys/firmware/acpi/interrupt and also 9 in /proc/interrupts. Change-Id: I3b3198276530bf6513d94e9bea02ab9751212adf Signed-off-by: Shaunak Saha <shaunak.saha@intel.com> Reviewed-on: https://review.coreboot.org/15324 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
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