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authorMaxim Polyakov <max.senia.poliak@gmail.com>2020-07-14 21:44:47 +0300
committerPatrick Georgi <pgeorgi@google.com>2020-07-26 21:47:22 +0000
commite9b0db388cdad6fb817487a35e89cce8348332b7 (patch)
treeb87bae6d464736c057482f2b5e8245ae5c1dc804 /src/lib/hw-time-timer.adb
parent148f8397d2793a465623877d311733eb82e4fe69 (diff)
mb/intel/cedarisland/Makefile: Add missing ramstage.c
Fixes a bug in Makefile.inc, which did not allow building ROM image with ramstage.c from motherboard configuration. Change-Id: I70d8a2e1f53e2fa56d514361116a55f175407753 Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43457 Reviewed-by: Andrey Petrov <andrey.petrov@gmail.com> Reviewed-by: Lance Zhao Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/lib/hw-time-timer.adb')
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