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authorDuncan Laurie <dlaurie@chromium.org>2013-03-15 09:42:00 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-03-22 00:17:00 +0100
commit8dddc30eb55bc57b1e319d35a66a1889a9716ca1 (patch)
treedeab2b8c2071013007134bb96aca4bacea9d0b39 /src/lib/generic_dump_spd.c
parentdd32a31fbafafb6fa3dd1dc342884ffe88a7aa04 (diff)
haswell: Add microcode for ULT C0 stepping 0x40651
Change-Id: I53982d88f94255abdbb38ca18f9d891d4bc161b0 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/2858 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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