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| author | Michał Żygowski <michal.zygowski@3mdeb.com> | 2022-04-20 12:52:51 +0200 |
|---|---|---|
| committer | Michał Żygowski <michal.zygowski@3mdeb.com> | 2022-06-28 09:16:54 +0000 |
| commit | f422ed898dfaaadf69409c1a79ffb5157f8897d6 (patch) | |
| tree | d91702d2ab9cb4a043fca85710782265e2861434 /src/lib/gcc.c | |
| parent | e28c71802d338ecc831776ed3d963a3cfc8ad302 (diff) | |
soc/intel/alderlake/acpi: Add ADL-S devices
Add PCIe Root Ports, USB ports and SIO devices for ADL-S chipset.
Add IRQ routing tables for PCIe Root ports up to 28th.
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I508fa1396b07f38801bcf50cdfdc876356d7ae9c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63785
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/lib/gcc.c')
0 files changed, 0 insertions, 0 deletions