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author | David Wu <david_wu@quanta.corp-partner.google.com> | 2022-07-25 11:09:19 +0800 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2022-07-26 20:36:31 +0000 |
commit | df721bd0c3ec964bc316844ed77b327a088e239d (patch) | |
tree | dd923e1b08e2b2c6594904dbd45919a246244807 /src/lib/fw_config.c | |
parent | 234e37099a9c742db31593cb9259e58d4fb105f9 (diff) |
mb/google/brask/var/kuldax: correct Type-A USB3 port0/1 tx_de_emp
1. Set Type-A USB3 port0/1 tx_de_emp to 0x2B to fix the USB3 Gen2 RX
signal integrity issue.
2. Disable unused USB port.
BUG=b:238230292
TEST=build FW and check Type-A USB3 port0/port1 RX pass
Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com>
Change-Id: I8356ca30a965e5774a1556c5cb81e1586c55496c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66118
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Derek Huang <derekhuang@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/lib/fw_config.c')
0 files changed, 0 insertions, 0 deletions