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authorRobert Chen <robert.chen@quanta.corp-partner.google.com>2023-02-09 20:55:21 -0500
committerFelix Held <felix-coreboot@felixheld.de>2023-02-13 14:43:44 +0000
commit0e0f9e51c4c4f190cbe7ef5bffa138601c644d3c (patch)
treebcf6a7edbc52dd179216e241ec134ccf0ab5f81c /src/lib/dp_aux.c
parent3eb17b91daac0b3acaffb01568d724d23c6f0eea (diff)
mb/google/brya/var/lisbon: Update gpio table
eMMC RST pin could reply on PLT_RST so we could keep GPP B3 in VIH. BUG=b:263548436 TEST=emerge-brask coreboot Change-Id: Iffbc9dc932325cdd2176b36795a2ff1b3690fbf8 Signed-off-by: Robert Chen <robert.chen@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72941 Reviewed-by: Kevin Chiu <kevin.chiu.17802@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
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