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authorJitao Shi <jitao.shi@mediatek.com>2019-10-21 16:47:18 +0800
committerPatrick Georgi <pgeorgi@google.com>2019-10-23 13:35:26 +0000
commit19e961e83c4200de78cbbb9e8e5800c535619a42 (patch)
treeed7a0af172bc1da20629c5559243b8279b4daaaf /src/lib/delay.c
parent68ff7298ecae29d524a6a082c6cc9057df8f5789 (diff)
soc/mediatek/mt8183: fine tune the phy timing
To fix MIPI D-PHY test failure, the hs-prepare should be less than LimitMin from spec, and we have to enlarge TEOT margin. BUG=b:138344447 BRANCH=kukui TEST=Boots correctly on kukui Change-Id: If91e7a546866299f02432be27fe778be5d7bdc5f Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36222 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Diffstat (limited to 'src/lib/delay.c')
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