diff options
| author | Joel Kitching <kitching@google.com> | 2018-08-17 15:38:59 +0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-08-22 15:33:50 +0000 |
| commit | 44cff7a8975b2adbf2866718ec8c61ab0d9bd505 (patch) | |
| tree | 92d4975db05b7dde5b861f03e5ee3c65bbb6b661 /src/lib/coreboot_table.c | |
| parent | 5846d5727a05e395d13317daba049e0e56e15d33 (diff) | |
cbtable: remove chromeos_acpi from cbtable
Since we can derive chromeos_acpi's location from that of
ACPI GNVS, remove chromeos_acpi entry from cbtable and
instead use acpi_gnvs + GVNS_CHROMEOS_ACPI_OFFSET.
BUG=b:112288216
TEST=None
CQ-DEPEND=CL:1179725
Change-Id: I74d8a9965a0ed7874ff03884e7a921fd725eace9
Signed-off-by: Joel Kitching <kitching@google.com>
Reviewed-on: https://review.coreboot.org/28190
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/lib/coreboot_table.c')
| -rw-r--r-- | src/lib/coreboot_table.c | 16 |
1 files changed, 0 insertions, 16 deletions
diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c index 6b0e1a0237..62b3aaa82b 100644 --- a/src/lib/coreboot_table.c +++ b/src/lib/coreboot_table.c @@ -195,19 +195,6 @@ static void lb_gpios(struct lb_header *header) } } -static void lb_chromeos_acpi(struct lb_header *header) -{ -#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) - struct lb_range *chromeos_acpi; - - chromeos_acpi = (struct lb_range *)lb_new_record(header); - chromeos_acpi->tag = LB_TAG_CHROMEOS_ACPI; - chromeos_acpi->size = sizeof(*chromeos_acpi); - acpi_get_chromeos_acpi_info(&chromeos_acpi->range_start, - &chromeos_acpi->range_size); -#endif -} - static void lb_vbnv(struct lb_header *header) { #if IS_ENABLED(CONFIG_PC80_SYSTEM) @@ -547,9 +534,6 @@ static uintptr_t write_coreboot_table(uintptr_t rom_table_end) /* Record our GPIO settings (ChromeOS specific) */ lb_gpios(head); - /* pass along the chromeos_acpi_t buffer address */ - lb_chromeos_acpi(head); - /* pass along VBNV offsets in CMOS */ lb_vbnv(head); |