diff options
author | Joel Kitching <kitching@google.com> | 2018-08-07 12:29:30 +0800 |
---|---|---|
committer | Aaron Durbin <adurbin@chromium.org> | 2018-08-14 14:48:44 +0000 |
commit | 75b1f768d8eef24769ae9b559f66b3561d24b010 (patch) | |
tree | 53ea561d1de45350cb804052d32c7a6c84e29618 /src/lib/coreboot_table.c | |
parent | 895439503954ab387f81061595bdfb1e27e6526c (diff) |
cbmem: rename vdat to chromeos_acpi
There is a confusingly named section in cbmem called vdat.
This section holds a data structure called chromeos_acpi_t,
which exposes some system information to the Chrome OS
userland utility crossystem.
Within the chromeos_acpi_t structure, there is a member
called vdat. This (currently) holds a VbSharedDataHeader.
Rename the outer vdat to chromeos_acpi to make its purpose
clear, and prevent the bizarreness of being able to access
vdat->vdat.
Additionally, disallow external references to the
chromeos_acpi data structure in gnvs.c.
BUG=b:112288216
TEST=emerge-eve coreboot, run on eve
CQ-DEPEND=CL:1164722
Change-Id: Ia74e58cde21678f24b0bb6c1ca15048677116b2e
Signed-off-by: Joel Kitching <kitching@google.com>
Reviewed-on: https://review.coreboot.org/27888
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/lib/coreboot_table.c')
-rw-r--r-- | src/lib/coreboot_table.c | 17 |
1 files changed, 9 insertions, 8 deletions
diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c index 2d74c8ec7f..6b0e1a0237 100644 --- a/src/lib/coreboot_table.c +++ b/src/lib/coreboot_table.c @@ -195,15 +195,16 @@ static void lb_gpios(struct lb_header *header) } } -static void lb_vdat(struct lb_header *header) +static void lb_chromeos_acpi(struct lb_header *header) { #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) - struct lb_range *vdat; + struct lb_range *chromeos_acpi; - vdat = (struct lb_range *)lb_new_record(header); - vdat->tag = LB_TAG_VDAT; - vdat->size = sizeof(*vdat); - acpi_get_vdat_info(&vdat->range_start, &vdat->range_size); + chromeos_acpi = (struct lb_range *)lb_new_record(header); + chromeos_acpi->tag = LB_TAG_CHROMEOS_ACPI; + chromeos_acpi->size = sizeof(*chromeos_acpi); + acpi_get_chromeos_acpi_info(&chromeos_acpi->range_start, + &chromeos_acpi->range_size); #endif } @@ -546,8 +547,8 @@ static uintptr_t write_coreboot_table(uintptr_t rom_table_end) /* Record our GPIO settings (ChromeOS specific) */ lb_gpios(head); - /* pass along the VDAT buffer address */ - lb_vdat(head); + /* pass along the chromeos_acpi_t buffer address */ + lb_chromeos_acpi(head); /* pass along VBNV offsets in CMOS */ lb_vbnv(head); |