diff options
| author | Eric Lai <ericr_lai@compal.corp-partner.google.com> | 2019-11-01 02:01:02 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-04 11:33:23 +0000 |
| commit | 1845fc89476df67c5981cb2d67ddb11d271154bb (patch) | |
| tree | b7af2168ea8bd5e57cf450a6c1b49e57462cb72d /src/lib/cbmem_common.c | |
| parent | e979442cd6c98b9f757d672dcd363a385182397d (diff) | |
mb/google/drallion: fix GPP_E16 glitch when enter S5
Set GPP_E16 reset to DEEP.
BUG=b:143057255
BRANCH=N/A
TEST=Measure GPP_E16 from S0 to S5 has no glitch
Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: I63932c6f5c8b7e6e9ab8aa55e69c629d29e7d1fe
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36511
Reviewed-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-by: Mathew King <mathewk@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/lib/cbmem_common.c')
0 files changed, 0 insertions, 0 deletions