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authorWerner Zeh <werner.zeh@siemens.com>2022-05-05 11:55:30 +0200
committerFelix Held <felix-coreboot@felixheld.de>2022-05-21 16:20:17 +0000
commit53553e8ee5c55030e3b60e933669f55994cc6ab7 (patch)
tree245bad7b4f5e8b8ce35227d452b1e12fddf09517 /src/lib/cbfs.c
parent3c88dc85f6d50cf294ebc2cadebbadab648b5f02 (diff)
src/soc/intel/cmn/fast-spi: Add SSDT extension to fast SPI driver
If the SPI controller is hidden from the OS (which is default on Apollo Lake) then OS has no chance to probe the device and therefore can not be aware of the resources this PCI device occupies. If the OS needs to move some resources for a reason it can happen that the new allocated window will be shadowed by the hidden PCI device resource and hence causing a conflict. As a result this MMIO window will be inaccessible from the OS which will cause issues in applications. For instance on Apollo Lake this causes flashrom to stop working. This patch adds a SSDT extension for the PCI device if it is hidden from the OS and reports the occupied resource via ACPI to the OS. For the cases where the device is hidden later at coreboot runtime and therefore is not marked as hidden in the PCI device itself a Kconfig switch called 'FAST_SPI_GENERATE_SSDT' is introduced. It defaults to 'no' and can be set from SOC code to override it. Since there is no defined ACPI ID for the fast SPI controller available now, the generic one (PNP0C02) is used. Test: Boot mc_apl4 and make sure flashrom works again. Change-Id: Ia16dfe6e001188aad26418afe0f04c53ecfd56f1 Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64076 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sean Rhodes <sean@starlabs.systems> Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/lib/cbfs.c')
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