diff options
author | Felix Singer <felixsinger@posteo.net> | 2019-07-28 13:27:11 +0200 |
---|---|---|
committer | Nico Huber <nico.h@gmx.de> | 2019-07-30 10:32:48 +0000 |
commit | d298ffe208f438f08192cab85e7f5ddda9bcb465 (patch) | |
tree | 2fc1d274bb5792d5bb71b1471218cf23f0fe2e98 /src/include | |
parent | 378352540d57d98055e6183aff4f0af81aeadf89 (diff) |
soc/intel/cannonlake: Add new PCI IDs
* PCH IDs: H310, H370, Z390, B360, C242, HM370
* IGD IDs: Another variant of UHD-Graphics 630
* MCH/CPU IDs: Used at i3-8100
Used documents:
* 337347-005
TESTED=Gigabyte Z390M Gaming
Change-Id: I5be88ef23359c6429b18f17bcffbffb7f10ba028
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34600
Reviewed-by: Christian Walter <christian.walter@9elements.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include')
-rw-r--r-- | src/include/device/pci_ids.h | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 26b1237639..b3822103f2 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -2729,9 +2729,15 @@ #define PCI_DEVICE_ID_INTEL_CNL_BASE_U_LPC 0x9d85 #define PCI_DEVICE_ID_INTEL_CNL_U_PREMIUM_LPC 0x9d84 #define PCI_DEVICE_ID_INTEL_CNL_Y_PREMIUM_LPC 0x9d83 +#define PCI_DEVICE_ID_INTEL_CNP_H_LPC_H310 0xa303 +#define PCI_DEVICE_ID_INTEL_CNP_H_LPC_H370 0xa304 +#define PCI_DEVICE_ID_INTEL_CNP_H_LPC_Z390 0xa305 #define PCI_DEVICE_ID_INTEL_CNP_H_LPC_Q370 0xa306 -#define PCI_DEVICE_ID_INTEL_CNP_H_LPC_QM370 0xa30c +#define PCI_DEVICE_ID_INTEL_CNP_H_LPC_B360 0xa308 #define PCI_DEVICE_ID_INTEL_CNP_H_LPC_C246 0xa309 +#define PCI_DEVICE_ID_INTEL_CNP_H_LPC_C242 0xa30a +#define PCI_DEVICE_ID_INTEL_CNP_H_LPC_QM370 0xa30c +#define PCI_DEVICE_ID_INTEL_CNP_H_LPC_HM370 0xa30d #define PCI_DEVICE_ID_INTEL_CNP_H_LPC_CM246 0xa30e #define PCI_DEVICE_ID_INTEL_ICL_U_SUPER_U_ESPI 0x3480 #define PCI_DEVICE_ID_INTEL_ICL_U_SUPER_U_ESPI_REV0 0x3481 @@ -3052,6 +3058,7 @@ #define PCI_DEVICE_ID_INTEL_CFL_S_GT2_1 0x3e92 #define PCI_DEVICE_ID_INTEL_CFL_S_GT2_2 0x3e98 #define PCI_DEVICE_ID_INTEL_CFL_S_GT2_3 0x3e9a +#define PCI_DEVICE_ID_INTEL_CFL_S_GT2_4 0x3e91 #define PCI_DEVICE_ID_INTEL_ICL_GT0_ULT 0x8A70 #define PCI_DEVICE_ID_INTEL_ICL_GT0_5_ULT 0x8A71 #define PCI_DEVICE_ID_INTEL_ICL_GT1_ULT 0x8A40 @@ -3114,6 +3121,7 @@ #define PCI_DEVICE_ID_INTEL_CFL_ID_H 0x3ec4 #define PCI_DEVICE_ID_INTEL_CFL_ID_H_8 0x3e20 #define PCI_DEVICE_ID_INTEL_CFL_ID_S 0x3ec2 +#define PCI_DEVICE_ID_INTEL_CFL_ID_S_DT_4 0x3e1f #define PCI_DEVICE_ID_INTEL_CFL_ID_S_DT_8 0x3e30 #define PCI_DEVICE_ID_INTEL_CFL_ID_S_WS_8 0x3e31 #define PCI_DEVICE_ID_INTEL_ICL_ID_U 0x8A12 |