diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2021-07-12 23:46:21 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-07-14 02:19:51 +0000 |
| commit | ceb2fbb9203c66478f1566d7fcfebc5d807bdb32 (patch) | |
| tree | 8137e9eb19d88e682a8d59ab5640c60f48861a14 /src/include | |
| parent | 78ab06ace918f6efa1a36c896b85806c5f617393 (diff) | |
include/cpu/x86/msr: add IA32_ prefix to MC0_ADDR and MC0_MISC
Those registers are architectural MSR and this also gets them in line
with IA32_MC0_CTL and IA32_MC0_STATUS. Also move them below the
definitions for IA32_MC0_STATUS, so that the numbers of the MSRs are
ascending.
Change-Id: Icef6526c896720248f5b648ddf1a271bdf46917c
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56235
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include')
| -rw-r--r-- | src/include/cpu/x86/msr.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/include/cpu/x86/msr.h b/src/include/cpu/x86/msr.h index 748aed5aa4..da1932cb66 100644 --- a/src/include/cpu/x86/msr.h +++ b/src/include/cpu/x86/msr.h @@ -74,11 +74,11 @@ #define MCA_STATUS_LO_ERRCODE_EXT_SH 16 #define MCA_STATUS_LO_ERRCODE_EXT_MASK (0x3f << MCA_STATUS_LO_ERRCODE_EXT_SH) #define MCA_STATUS_LO_ERRCODE_MASK (0xffff << 0) +#define IA32_MC0_ADDR 0x402 +#define IA32_MC0_MISC 0x403 #define IA32_VMX_BASIC_MSR 0x480 #define VMX_BASIC_HI_DUAL_MONITOR (1UL << (49 - 32)) #define IA32_VMX_MISC_MSR 0x485 -#define MC0_ADDR 0x402 -#define MC0_MISC 0x403 #define MC0_CTL_MASK 0xC0010044 #define IA32_PM_ENABLE 0x770 |