summaryrefslogtreecommitdiff
path: root/src/include
diff options
context:
space:
mode:
authorRob Barnes <robbarnes@google.com>2020-09-14 07:46:19 -0600
committerAaron Durbin <adurbin@chromium.org>2020-09-16 03:24:50 +0000
commita01ee36288b26f31fc1e912324293104f33211c3 (patch)
treebce1967dab34f331666679524e7d487529cd3038 /src/include
parentfcd7d0518c0719701c7ed58cd0e0869be492d34c (diff)
device/dram: Add method for converting MHz to MT/s
Add method for converting DDR4 speed in MHz to MT/s. Checks that MHz is within a speed grade range. BUG=b:167155849 TEST=ddr4-test unit test BRANCH=Zork Change-Id: I1433f028afb794fe3e397b03f5bd0565494c8130 Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45343 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/include')
-rw-r--r--src/include/device/dram/ddr4.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/include/device/dram/ddr4.h b/src/include/device/dram/ddr4.h
index d22d4bc500..eac8bf8920 100644
--- a/src/include/device/dram/ddr4.h
+++ b/src/include/device/dram/ddr4.h
@@ -69,4 +69,9 @@ enum cb_err spd_add_smbios17_ddr4(const u8 channel, const u8 slot,
const u16 selected_freq,
const dimm_attr *info);
+/**
+ * Converts DDR4 clock speed in MHz to the standard reported speed in MT/s
+ */
+uint16_t ddr4_speed_mhz_to_reported_mts(uint16_t speed_mhz);
+
#endif /* DEVICE_DRAM_DDR4L_H */