summaryrefslogtreecommitdiff
path: root/src/include
diff options
context:
space:
mode:
authorEric Biederman <ebiederm@xmission.com>2003-06-17 08:42:17 +0000
committerEric Biederman <ebiederm@xmission.com>2003-06-17 08:42:17 +0000
commit8d9c123812492a80a43112c8dd217fcfb3cee2c5 (patch)
tree0bc841279e289f958d85cc8f2873b42770ecbce1 /src/include
parentf96a810f11681ba436b446e9451e02cffcd525f5 (diff)
- Minor mod to reset16.inc to work with newer binutils hopefully this works with older ones...
- Update apic.h to include the APIC_TASK_PRI register definition - Update mptable.c to have a reasonable board OEM and productid - Additional testfiles for romcc. - Split out auto.c and early failover.c moving their generic bits elsewere - Enable cache of the rom - Fixes to amd8111_lpc.c so that we successfully setup virtual wire mode on the ioapic git-svn-id: svn://svn.coreboot.org/coreboot/trunk@880 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/include')
-rw-r--r--src/include/cpu/p6/apic.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/include/cpu/p6/apic.h b/src/include/cpu/p6/apic.h
index b91cdb2a86..65a14603f5 100644
--- a/src/include/cpu/p6/apic.h
+++ b/src/include/cpu/p6/apic.h
@@ -10,6 +10,8 @@
#define APIC_ID 0x020
#define APIC_LVR 0x030
+#define APIC_TASKPRI 0x80
+#define APIC_TPRI_MASK 0xFF
#define APIC_ARBID 0x090
#define APIC_RRR 0x0C0
#define APIC_SVR 0x0f0