diff options
author | Mario Scheithauer <mario.scheithauer@siemens.com> | 2022-05-19 12:06:33 +0200 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2022-05-20 11:22:03 +0000 |
commit | 5b757b597a3e75c6d0d17025288de8d162a77f52 (patch) | |
tree | b98e4a03330f95ba07d81aae07cefaff24aca509 /src/include | |
parent | e1c385ebe142845012e0a844d798fa7268c1cfd8 (diff) |
soc/intel/ehl: Use defines for Ethernet controller IDs
Use defines for a better reading of the code.
Change-Id: I8e696240d649c0ea2341b8f04b62eebffebc1d57
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64519
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include')
-rw-r--r-- | src/include/device/pci_ids.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 79decbe5a3..ddc055fdf2 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -4482,6 +4482,11 @@ #define PCI_DID_INTEL_MTL_CRASHLOG_SRAM 0x7d0d #define PCI_DID_INTEL_RPL_CPU_CRASHLOG_SRAM 0xa77d +/* Intel Ethernet Controller device Ids */ +#define PCI_DID_INTEL_EHL_GBE_HOST 0x4B32 +#define PCI_DID_INTEL_EHL_GBE_PSE_0 0x4BA0 +#define PCI_DID_INTEL_EHL_GBE_PSE_1 0x4BB0 + #define PCI_VID_COMPUTONE 0x8e0e #define PCI_DID_COMPUTONE_IP2EX 0x0291 #define PCI_DID_COMPUTONE_PG 0x0302 |