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authorSubrata Banik <subratabanik@google.com>2024-07-17 12:09:21 +0000
committerSubrata Banik <subratabanik@google.com>2024-07-19 03:56:13 +0000
commit4cf322eda50f67ee948b9153e6d45904a813a661 (patch)
tree1629781fcf30dc6cf04dfa07e4a596503d37ed58 /src/include
parentc901841ec155c658b8ecf33c3b2474599e91dc08 (diff)
device/pci_ids: Add new Intel PTL device IDs for CNVi
This patch adds new CNVi PCI device IDs for Intel PTL-U and PTL-H. Additionally, updates the CNVi driver's `pci_device_ids` list to include these new IDs. Finally, dropped unused BT PCI IDs. Source: Intel PTL-EDS vol 1. Document Number 815002, Rev 0.51 Chapter 2 BUG=b:347669091 TEST=Able to build google/fatcat. Change-Id: I7d80403b87537aea41ff48ff6d274180577f1ac6 Signed-off-by: Subrata Banik <subratabanik@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83520 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include')
-rw-r--r--src/include/device/pci_ids.h13
1 files changed, 8 insertions, 5 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index 27cedd9475..8b2de41b8b 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -4867,11 +4867,14 @@
#define PCI_DID_INTEL_LNL_CNVI_WIFI_2 0xa842
#define PCI_DID_INTEL_LNL_CNVI_WIFI_3 0xa843
#define PCI_DID_INTEL_LNL_CNVI_BT 0xa876
-#define PCI_DID_INTEL_PTL_CNVI_WIFI_0 0xe440
-#define PCI_DID_INTEL_PTL_CNVI_WIFI_1 0xe441
-#define PCI_DID_INTEL_PTL_CNVI_WIFI_2 0xe442
-#define PCI_DID_INTEL_PTL_CNVI_WIFI_3 0xe443
-#define PCI_DID_INTEL_PTL_CNVI_BT 0xe476
+#define PCI_DID_INTEL_PTL_H_CNVI_WIFI_0 0xe440
+#define PCI_DID_INTEL_PTL_H_CNVI_WIFI_1 0xe441
+#define PCI_DID_INTEL_PTL_H_CNVI_WIFI_2 0xe442
+#define PCI_DID_INTEL_PTL_H_CNVI_WIFI_3 0xe443
+#define PCI_DID_INTEL_PTL_U_H_CNVI_WIFI_0 0xe340
+#define PCI_DID_INTEL_PTL_U_H_CNVI_WIFI_1 0xe341
+#define PCI_DID_INTEL_PTL_U_H_CNVI_WIFI_2 0xe342
+#define PCI_DID_INTEL_PTL_U_H_CNVI_WIFI_3 0xe343
/* Platform Security Engine */
#define PCI_DID_INTEL_LNL_PSE0 0xa862