diff options
| author | Jeremy Compostella <jeremy.compostella@intel.com> | 2023-05-22 17:38:10 -0700 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2023-05-31 14:22:31 +0000 |
| commit | 4a2ce029fb9af7aaa33128ae0af2d4a01dfadd08 (patch) | |
| tree | 1adf753382cd3648fe1b4677247c6f0ec99df876 /src/include | |
| parent | f167df4d3fbfd74b4bbf35502daf8e533a925eaf (diff) | |
cpu/x86/mp_init: Use clflush to write SIPI data back to RAM
Improve boot time performances by replacing the wbinvd instruction
with multiple clflush to ensure that the SIPI data is written back to
RAM.
According to some experimental measurements, the wbinvd execution
takes between 1.6 up and 6 milliseconds to complete. In the case of
the SIPI data, wbinvd unnecessarily flushes and invalidates the entire
cache. Indeed, the SIPI module is quite small (about 400 bytes) and
cflush'ing the associated cache lines is almost instantaneous,
typically less than 100 microseconds.
BUG=b/260455826
TEST=Successful boot on Skolas and Rex board
Change-Id: I0e00db8eaa6a3cb41bec3422572c8f2a9bec4057
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Suggested-by: Erin Park <erin.park@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75391
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/include')
| -rw-r--r-- | src/include/cpu/x86/cache.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/include/cpu/x86/cache.h b/src/include/cpu/x86/cache.h index 63703a7871..d35c4e7fd0 100644 --- a/src/include/cpu/x86/cache.h +++ b/src/include/cpu/x86/cache.h @@ -13,6 +13,7 @@ #if !defined(__ASSEMBLER__) #include <stdbool.h> +#include <stddef.h> static inline void wbinvd(void) { @@ -30,6 +31,7 @@ static inline void clflush(void *addr) } bool clflush_supported(void); +void clflush_region(const uintptr_t start, const size_t size); /* The following functions require the __always_inline due to AMD * function STOP_CAR_AND_CPU that disables cache as |