aboutsummaryrefslogtreecommitdiff
path: root/src/include
diff options
context:
space:
mode:
authorArthur Heymans <arthur@aheymans.xyz>2023-06-27 16:44:59 +0200
committerLean Sheng Tan <sheng.tan@9elements.com>2023-09-18 13:34:47 +0000
commit3df6cc9de61ba16a94b40086999ddb6a9943dc26 (patch)
treeadf8645c5b6fc22002b85b7f99858bd9cc4d8d0f /src/include
parentfca612497db15caebdf97d741c85193ee2f0044b (diff)
acpi: Add functions to declare ARM GIC V3 hardware
For GICD and GICR a SOC needs to implement 2 callbacks to get the base of those interrupt controllers. For all the cpu GIC the code loops over all the DEVICE_PATH_GICC_V3 devices in a similar fashion to how x86 lapics are added. It's up to the SOC to add those devices to the tree. Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Change-Id: I5074d0a76316e854b7801e14b3241f88e805b02f Reviewed-on: https://review.coreboot.org/c/coreboot/+/76132 Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include')
-rw-r--r--src/include/acpi/acpi.h3
-rw-r--r--src/include/device/path.h9
2 files changed, 12 insertions, 0 deletions
diff --git a/src/include/acpi/acpi.h b/src/include/acpi/acpi.h
index 16fe912b39..201d851baf 100644
--- a/src/include/acpi/acpi.h
+++ b/src/include/acpi/acpi.h
@@ -1566,6 +1566,9 @@ unsigned long acpi_create_madt_one_lapic(unsigned long current, u32 cpu, u32 api
unsigned long acpi_create_madt_lapic_nmis(unsigned long current);
+uintptr_t platform_get_gicd_base(void);
+uintptr_t platform_get_gicr_base(void);
+
int acpi_create_srat_lapic(acpi_srat_lapic_t *lapic, u8 node, u8 apic);
int acpi_create_srat_x2apic(acpi_srat_x2apic_t *x2apic, u32 node, u32 apic);
int acpi_create_srat_mem(acpi_srat_mem_t *mem, u8 node, u32 basek, u32 sizek,
diff --git a/src/include/device/path.h b/src/include/device/path.h
index c0df66b821..f8c43901c5 100644
--- a/src/include/device/path.h
+++ b/src/include/device/path.h
@@ -23,6 +23,7 @@ enum device_path_type {
DEVICE_PATH_MMIO,
DEVICE_PATH_GPIO,
DEVICE_PATH_MDIO,
+ DEVICE_PATH_GICC_V3,
/*
* When adding path types to this table, please also update the
@@ -48,6 +49,7 @@ enum device_path_type {
"DEVICE_PATH_MMIO", \
"DEVICE_PATH_GPIO", \
"DEVICE_PATH_MDIO", \
+ "DEVICE_PATH_GICC_V3", \
}
struct domain_path {
@@ -120,6 +122,12 @@ struct mdio_path {
unsigned int addr;
};
+struct gicc_v3_path {
+ unsigned long long mpidr;
+ unsigned int vgic_mi;
+ unsigned int pi_gsiv;
+};
+
struct device_path {
enum device_path_type type;
union {
@@ -138,6 +146,7 @@ struct device_path {
struct mmio_path mmio;
struct gpio_path gpio;
struct mdio_path mdio;
+ struct gicc_v3_path gicc_v3;
};
};