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authorSubrata Banik <subratabanik@google.com>2022-12-19 21:31:49 +0530
committerSubrata Banik <subratabanik@google.com>2022-12-22 08:07:12 +0000
commit2585a999bb9ce17870523d52184fcaa298b2f806 (patch)
tree0cd0278785b5490bc9f21c2580bce51f30d5804d /src/include
parent4225a796fa44efa372e398ce05d3eca3d819ed6e (diff)
soc/intel: Set `use_eisa_hids` based on `DPTF_USE_EISA_HID` config
This patch avoids hardcoding to the `use_eisa_hids` variable instead relying on the SoC config to choose if the SoC platform supports EISA HID. If any SoC platform has the support then the `use_eisa_hids` variable would be set to `true` based on the selection of `DPTF_USE_EISA_HID` config. Note: Prior to Tiger Lake, all DPTF devices used 7-character EISA IDs. If selected, the 7-character _HIDs will be emitted, otherwise, it will use the "new" style, which are regular 8-character _HIDs. Ideally, the platform prior to Tiger Lake would set `use_eisa_hids` to `true` and platform posts that would set `use_eisa_hids` to `false`. Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: I869bebc8e17c1e65979ca3431308d69771a34fa3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/71110 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-by: Tarun Tuli <taruntuli@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kapil Porwal <kapilporwal@google.com>
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