diff options
author | Jeremy Soller <jeremy@system76.com> | 2021-08-10 14:06:51 -0600 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2021-08-19 13:51:59 +0000 |
commit | 191a8d7d2e40b9c90d81cf8e5ea3fad414afeb29 (patch) | |
tree | 02ba387688abd6b1ad7c313f3b35d904b3093a62 /src/include | |
parent | d7df383342ee8f36783e1c8bf70c9a65225dd168 (diff) |
soc/intel/common: Add TGL-H PCI IDs
Add TGL-H PCI IDs from the Processor and PCH EDS docs.
Reference:
- Intel doc 615985
- Intel doc 575683
Change-Id: I751d0d59aff9e93e2aa92546db78775bd1e6ef22
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56900
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/include')
-rw-r--r-- | src/include/device/pci_ids.h | 79 |
1 files changed, 79 insertions, 0 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 375704612c..2fad168687 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -2159,6 +2159,7 @@ #define PCI_DEVICE_ID_INTEL_CNL_ISHB 0x9dfc #define PCI_DEVICE_ID_INTEL_CML_ISHB 0x02fc #define PCI_DEVICE_ID_INTEL_TGL_ISHB 0xa0fc +#define PCI_DEVICE_ID_INTEL_TGL_H_ISHB 0x43fc /* Intel 82371FB (PIIX) */ #define PCI_DEVICE_ID_INTEL_82371FB_ISA 0x122e @@ -2935,6 +2936,15 @@ #define PCI_DEVICE_ID_INTEL_TGP_ESPI_24 0xA09D #define PCI_DEVICE_ID_INTEL_TGP_ESPI_25 0xA09E #define PCI_DEVICE_ID_INTEL_TGP_ESPI_26 0xA09F +#define PCI_DEVICE_ID_INTEL_TGP_H_ESPI_B560 0x4387 +#define PCI_DEVICE_ID_INTEL_TGP_H_ESPI_H510 0x4388 +#define PCI_DEVICE_ID_INTEL_TGP_H_ESPI_H570 0x4386 +#define PCI_DEVICE_ID_INTEL_TGP_H_ESPI_Q570 0x4384 +#define PCI_DEVICE_ID_INTEL_TGP_H_ESPI_W580 0x438F +#define PCI_DEVICE_ID_INTEL_TGP_H_ESPI_Z590 0x4385 +#define PCI_DEVICE_ID_INTEL_TGP_H_ESPI_HM570 0x438B +#define PCI_DEVICE_ID_INTEL_TGP_H_ESPI_QM580 0x438A +#define PCI_DEVICE_ID_INTEL_TGP_H_ESPI_WM590 0x4389 #define PCI_DEVICE_ID_INTEL_MCC_ESPI_0 0x4b00 #define PCI_DEVICE_ID_INTEL_MCC_ESPI_1 0x4b04 #define PCI_DEVICE_ID_INTEL_MCC_BASE_ESPI 0x4b03 @@ -3213,6 +3223,31 @@ #define PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP15 0xa0b6 #define PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP16 0xa0b7 +#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP1 0x43b8 +#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP2 0x43b9 +#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP3 0x43ba +#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP4 0x43bb +#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP5 0x43bc +#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP6 0x43bd +#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP7 0x43be +#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP8 0x43bf +#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP9 0x43b0 +#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP10 0x43b1 +#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP11 0x43b2 +#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP12 0x43b3 +#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP13 0x43b4 +#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP14 0x43b5 +#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP15 0x43b6 +#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP16 0x43b7 +#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP17 0x43c0 +#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP18 0x43c1 +#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP19 0x43c2 +#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP20 0x43c3 +#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP21 0x43c4 +#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP22 0x43c5 +#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP23 0x43c6 +#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP24 0x43c7 + #define PCI_DEVICE_ID_INTEL_CNP_H_PCIE_RP1 0xa338 #define PCI_DEVICE_ID_INTEL_CNP_H_PCIE_RP2 0xa339 #define PCI_DEVICE_ID_INTEL_CNP_H_PCIE_RP3 0xa33a @@ -3402,6 +3437,7 @@ #define PCI_DEVICE_ID_INTEL_TGP_SATA 0xa0d5 #define PCI_DEVICE_ID_INTEL_TGP_PREMIUM_SATA 0xa0d7 #define PCI_DEVICE_ID_INTEL_TGP_COMPAT_SATA 0x282a +#define PCI_DEVICE_ID_INTEL_TGP_H_SATA 0x43d3 #define PCI_DEVICE_ID_INTEL_MCC_AHCI_SATA 0x4b60 #define PCI_DEVICE_ID_INTEL_JSP_SATA_1 0x4dd2 #define PCI_DEVICE_ID_INTEL_JSP_SATA_2 0x4dd3 @@ -3435,6 +3471,7 @@ #define PCI_DEVICE_ID_INTEL_CMP_PMC 0x02a1 #define PCI_DEVICE_ID_INTEL_CMP_H_PMC 0x06a1 #define PCI_DEVICE_ID_INTEL_TGP_PMC 0xa0a1 +#define PCI_DEVICE_ID_INTEL_TGP_H_PMC 0x43a1 #define PCI_DEVICE_ID_INTEL_MCC_PMC 0x4b21 #define PCI_DEVICE_ID_INTEL_JSP_PMC 0x4da1 #define PCI_DEVICE_ID_INTEL_ADP_P_PMC 0x7a21 @@ -3504,6 +3541,13 @@ #define PCI_DEVICE_ID_INTEL_TGP_I2C5 0xa0c6 #define PCI_DEVICE_ID_INTEL_TGP_I2C6 0xa0d8 #define PCI_DEVICE_ID_INTEL_TGP_I2C7 0xa0d9 +#define PCI_DEVICE_ID_INTEL_TGP_H_I2C0 0x43e8 +#define PCI_DEVICE_ID_INTEL_TGP_H_I2C1 0x43e9 +#define PCI_DEVICE_ID_INTEL_TGP_H_I2C2 0x43ea +#define PCI_DEVICE_ID_INTEL_TGP_H_I2C3 0x43eb +#define PCI_DEVICE_ID_INTEL_TGP_H_I2C4 0x43ad +#define PCI_DEVICE_ID_INTEL_TGP_H_I2C5 0x43ae +#define PCI_DEVICE_ID_INTEL_TGP_H_I2C6 0x43d8 #define PCI_DEVICE_ID_INTEL_MCC_I2C0 0x4b78 #define PCI_DEVICE_ID_INTEL_MCC_I2C1 0x4b79 #define PCI_DEVICE_ID_INTEL_MCC_I2C2 0x4b7a @@ -3581,6 +3625,10 @@ #define PCI_DEVICE_ID_INTEL_TGP_UART0 0xa0a8 #define PCI_DEVICE_ID_INTEL_TGP_UART1 0xa0a9 #define PCI_DEVICE_ID_INTEL_TGP_UART2 0xa0c7 +#define PCI_DEVICE_ID_INTEL_TGP_H_UART0 0x43a8 +#define PCI_DEVICE_ID_INTEL_TGP_H_UART1 0x43a9 +#define PCI_DEVICE_ID_INTEL_TGP_H_UART2 0x43a7 +#define PCI_DEVICE_ID_INTEL_TGP_H_UART3 0x43da #define PCI_DEVICE_ID_INTEL_MCC_UART0 0x4b28 #define PCI_DEVICE_ID_INTEL_MCC_UART1 0x4b29 #define PCI_DEVICE_ID_INTEL_MCC_UART2 0x4b4d @@ -3652,6 +3700,11 @@ #define PCI_DEVICE_ID_INTEL_TGP_GSPI4 0xa0fe #define PCI_DEVICE_ID_INTEL_TGP_GSPI5 0xa0de #define PCI_DEVICE_ID_INTEL_TGP_GSPI6 0xa0df +#define PCI_DEVICE_ID_INTEL_TGP_H_SPI0 0x43a4 +#define PCI_DEVICE_ID_INTEL_TGP_H_GSPI0 0x43aa +#define PCI_DEVICE_ID_INTEL_TGP_H_GSPI1 0x43ab +#define PCI_DEVICE_ID_INTEL_TGP_H_GSPI2 0x43fb +#define PCI_DEVICE_ID_INTEL_TGP_H_GSPI3 0x43fd #define PCI_DEVICE_ID_INTEL_MCC_SPI0 0x4b24 #define PCI_DEVICE_ID_INTEL_MCC_GSPI0 0x4b2a #define PCI_DEVICE_ID_INTEL_MCC_GSPI1 0x4b2b @@ -3788,6 +3841,8 @@ #define PCI_DEVICE_ID_INTEL_TGL_GT2 0xFF20 #define PCI_DEVICE_ID_INTEL_TGL_GT2_Y 0x9A40 #define PCI_DEVICE_ID_INTEL_TGL_GT0 0x9A7F +#define PCI_DEVICE_ID_INTEL_TGL_GT1_H_32 0x9A60 +#define PCI_DEVICE_ID_INTEL_TGL_GT1_H_16 0x9A68 #define PCI_DEVICE_ID_INTEL_TGL_GT2_ULT 0x9A49 #define PCI_DEVICE_ID_INTEL_TGL_GT3_ULT 0x9A52 #define PCI_DEVICE_ID_INTEL_TGL_GT2_ULX 0x9A40 @@ -3884,6 +3939,8 @@ #define PCI_DEVICE_ID_INTEL_TGL_ID_U_4_2 0x9A14 #define PCI_DEVICE_ID_INTEL_TGL_ID_Y_2_2 0x9A02 #define PCI_DEVICE_ID_INTEL_TGL_ID_Y_4_2 0x9A12 +#define PCI_DEVICE_ID_INTEL_TGL_ID_H_6_1 0x9A26 +#define PCI_DEVICE_ID_INTEL_TGL_ID_H_8_1 0x9A36 #define PCI_DEVICE_ID_INTEL_EHL_ID_0 0x4510 #define PCI_DEVICE_ID_INTEL_EHL_ID_1 0x4522 #define PCI_DEVICE_ID_INTEL_EHL_ID_1A 0x4538 @@ -3947,6 +4004,7 @@ #define PCI_DEVICE_ID_INTEL_CMP_SMBUS 0x02a3 #define PCI_DEVICE_ID_INTEL_CMP_H_SMBUS 0x06a3 #define PCI_DEVICE_ID_INTEL_TGP_LP_SMBUS 0xa0a3 +#define PCI_DEVICE_ID_INTEL_TGP_H_SMBUS 0x43a3 #define PCI_DEVICE_ID_INTEL_MCC_SMBUS 0x4b23 #define PCI_DEVICE_ID_INTEL_JSP_SMBUS 0x4da3 #define PCI_DEVICE_ID_INTEL_ADP_P_SMBUS 0xa0a3 @@ -3975,6 +4033,8 @@ #define PCI_DEVICE_ID_INTEL_CMP_H_XHCI 0x06ed #define PCI_DEVICE_ID_INTEL_TGP_LP_XHCI 0xa0ed #define PCI_DEVICE_ID_INTEL_TGP_TCSS_XHCI 0x9a13 +#define PCI_DEVICE_ID_INTEL_TGP_H_XHCI 0x43ed +#define PCI_DEVICE_ID_INTEL_TGP_H_TCSS_XHCI 0x9a17 #define PCI_DEVICE_ID_INTEL_MCC_XHCI 0x4b7d #define PCI_DEVICE_ID_INTEL_JSP_XHCI 0x4ded #define PCI_DEVICE_ID_INTEL_ADP_P_XHCI 0x51ed @@ -3996,6 +4056,7 @@ #define PCI_DEVICE_ID_INTEL_CMP_P2SB 0x02a0 #define PCI_DEVICE_ID_INTEL_CMP_H_P2SB 0x06a0 #define PCI_DEVICE_ID_INTEL_TGL_P2SB 0xa0a0 +#define PCI_DEVICE_ID_INTEL_TGL_H_P2SB 0x43a0 #define PCI_DEVICE_ID_INTEL_EHL_P2SB 0x4b20 #define PCI_DEVICE_ID_INTEL_JSP_P2SB 0x4da0 #define PCI_DEVICE_ID_INTEL_ADP_P_P2SB 0x7a20 @@ -4011,6 +4072,7 @@ #define PCI_DEVICE_ID_INTEL_CMP_SRAM 0x02ef #define PCI_DEVICE_ID_INTEL_CMP_H_SRAM 0x06ef #define PCI_DEVICE_ID_INTEL_TGL_SRAM 0xa0ef +#define PCI_DEVICE_ID_INTEL_TGL_H_SRAM 0x43ef #define PCI_DEVICE_ID_INTEL_MCC_SRAM 0x4b7f #define PCI_DEVICE_ID_INTEL_JSP_SRAM 0x4def #define PCI_DEVICE_ID_INTEL_ADP_P_SRAM 0x7a6f @@ -4034,6 +4096,7 @@ #define PCI_DEVICE_ID_INTEL_CMP_H_AUDIO 0x06c8 #define PCI_DEVICE_ID_INTEL_BSW_AUDIO 0x2284 #define PCI_DEVICE_ID_INTEL_TGL_AUDIO 0xa0c8 +#define PCI_DEVICE_ID_INTEL_TGL_H_AUDIO 0x43c8 #define PCI_DEVICE_ID_INTEL_MCC_AUDIO 0x4b55 #define PCI_DEVICE_ID_INTEL_JSP_AUDIO 0x4dc8 #define PCI_DEVICE_ID_INTEL_ADP_S_AUDIO_1 0x7ad0 @@ -4072,6 +4135,7 @@ #define PCI_DEVICE_ID_INTEL_CMP_CSE0 0x02e0 #define PCI_DEVICE_ID_INTEL_CMP_H_CSE0 0x06e0 #define PCI_DEVICE_ID_INTEL_TGL_CSE0 0xa0e0 +#define PCI_DEVICE_ID_INTEL_TGL_H_CSE0 0x43e0 #define PCI_DEVICE_ID_INTEL_MCC_CSE0 0x4b70 #define PCI_DEVICE_ID_INTEL_MCC_CSE1 0x4b71 #define PCI_DEVICE_ID_INTEL_MCC_CSE2 0x4b74 @@ -4104,6 +4168,7 @@ #define PCI_DEVICE_ID_INTEL_CMP_H_XDCI 0x06ee #define PCI_DEVICE_ID_INTEL_TGP_LP_XDCI 0xa0ee #define PCI_DEVICE_ID_INTEL_TGP_TCSS_XDCI 0x9a15 +#define PCI_DEVICE_ID_INTEL_TGP_H_XDCI 0x43ee #define PCI_DEVICE_ID_INTEL_MCC_XDCI 0x4b7e #define PCI_DEVICE_ID_INTEL_JSP_XDCI 0x4dee #define PCI_DEVICE_ID_INTEL_ADP_P_XDCI 0x51ee @@ -4134,12 +4199,18 @@ #define PCI_DEVICE_ID_INTEL_TGL_TBT_RP1 0x9a25 #define PCI_DEVICE_ID_INTEL_TGL_TBT_RP2 0x9a27 #define PCI_DEVICE_ID_INTEL_TGL_TBT_RP3 0x9a29 +#define PCI_DEVICE_ID_INTEL_TGL_H_TBT_RP0 0x9a2b +#define PCI_DEVICE_ID_INTEL_TGL_H_TBT_RP1 0x9a2d +#define PCI_DEVICE_ID_INTEL_TGL_H_TBT_RP2 0x9a2f +#define PCI_DEVICE_ID_INTEL_TGL_H_TBT_RP3 0x9a31 #define PCI_DEVICE_ID_INTEL_ADL_TBT_RP0 0x466e #define PCI_DEVICE_ID_INTEL_ADL_TBT_RP1 0x463f #define PCI_DEVICE_ID_INTEL_ADL_TBT_RP2 0x462f #define PCI_DEVICE_ID_INTEL_ADL_TBT_RP3 0x461f #define PCI_DEVICE_ID_INTEL_TGL_TBT_DMA0 0x9a1b #define PCI_DEVICE_ID_INTEL_TGL_TBT_DMA1 0x9a1d +#define PCI_DEVICE_ID_INTEL_TGL_H_TBT_DMA0 0x9a1f +#define PCI_DEVICE_ID_INTEL_TGL_H_TBT_DMA1 0x9a21 #define PCI_DEVICE_ID_INTEL_ADL_TBT_DMA0 0x463e #define PCI_DEVICE_ID_INTEL_ADL_TBT_DMA1 0x466d @@ -4176,6 +4247,7 @@ #define PCI_DEVICE_ID_GrP_6SERIES_2_WIFI 0x7af0 #define PCI_DEVICE_ID_INTEL_TGL_IPU 0x9a19 +#define PCI_DEVICE_ID_INTEL_TGL_H_IPU 0x9a39 #define PCI_DEVICE_ID_INTEL_JSL_IPU 0x4e19 #define PCI_DEVICE_ID_INTEL_ADL_IPU 0x465d @@ -4204,6 +4276,13 @@ #define PCI_DEVICE_ID_INTEL_TGL_CNVI_BT_1 0xa0f6 #define PCI_DEVICE_ID_INTEL_TGL_CNVI_BT_2 0xa0f7 #define PCI_DEVICE_ID_INTEL_TGL_CNVI_BT_3 0xa0f8 +#define PCI_DEVICE_ID_INTEL_TGL_H_CNVI_WIFI_0 0x43f0 +#define PCI_DEVICE_ID_INTEL_TGL_H_CNVI_WIFI_1 0x43f1 +#define PCI_DEVICE_ID_INTEL_TGL_H_CNVI_WIFI_2 0x43f2 +#define PCI_DEVICE_ID_INTEL_TGL_H_CNVI_WIFI_3 0x43f3 +#define PCI_DEVICE_ID_INTEL_TGL_H_CNVI_BT_0 0x43f5 +#define PCI_DEVICE_ID_INTEL_TGL_H_CNVI_BT_1 0x43f6 +#define PCI_DEVICE_ID_INTEL_TGL_H_CNVI_BT_2 0x43f7 #define PCI_VENDOR_ID_COMPUTONE 0x8e0e #define PCI_DEVICE_ID_COMPUTONE_IP2EX 0x0291 |