diff options
| author | Richard Smith <smithbone@gmail.com> | 2006-08-25 16:14:31 +0000 |
|---|---|---|
| committer | Richard Smith <smithbone@gmail.com> | 2006-08-25 16:14:31 +0000 |
| commit | fa60e7f9d06d9a54e8bcc9e6f90eb3bc6ae4095e (patch) | |
| tree | 53fbecb678a20bb807575ea2e3bda18ac445aa7b /src/include | |
| parent | 64443b8c4970cc61ca4501d041d9e6983d02bef9 (diff) | |
- USB P4 as host fix
This should make the USB P4 work as a USB host
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2389 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/include')
| -rw-r--r-- | src/include/cpu/amd/gx2def.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/include/cpu/amd/gx2def.h b/src/include/cpu/amd/gx2def.h index 06f9a6372b..68969974a7 100644 --- a/src/include/cpu/amd/gx2def.h +++ b/src/include/cpu/amd/gx2def.h @@ -706,6 +706,8 @@ /* SouthBridge Equates*/ /* MSR_SB and SB_SHIFT are located in CPU.inc*/ +#define MSR_SB_USB2_MEM_DES ((1<<16) + MSR_SB + 0x25) /* Hack to make USB P4 work */ + #define MSR_SB_GLIU ((9 << 14) + MSR_SB) /* 51024xxx or 510*xxxx - fake out just like GL0 on CPU. */ #define MSR_SB_GLPCI (MSR_SB) /* 5100xxxx - don't go to the GLIU */ #define MSR_SB_USB2 ((2 << SB_SHIFT) + MSR_SB) /* 5120xxxx */ |