diff options
| author | Morgan Jang <Morgan_Jang@wiwynn.com> | 2020-10-06 16:26:17 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-10-26 06:54:04 +0000 |
| commit | 8ae391d199016a83f11db8724bb8e780441afa3b (patch) | |
| tree | a867659a30318fd88ca835f9c7ecba70063cbebe /src/include | |
| parent | 8ccc8fdf26a9172ef8023e91630bdf88239170c7 (diff) | |
arch/x86/smbios: Populate SMBIOS type 7 with cache information
SMBIOS has a field to display the cache size, which is currently
set to UNKNOWN unconditionally, multiply the cache size of L1 and L2
by the number of cores.
TEST=Execute "dmidecode -t 7" to check if the cache information
is correct for Deltalake platform
Change-Id: Ieeb5d3346454ffb2291613dc2aa24b31d10c2e04
Signed-off-by: Morgan Jang <Morgan_Jang@wiwynn.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46068
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include')
| -rw-r--r-- | src/include/smbios.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/src/include/smbios.h b/src/include/smbios.h index 8033d6ca98..6a19655b31 100644 --- a/src/include/smbios.h +++ b/src/include/smbios.h @@ -61,6 +61,10 @@ unsigned int smbios_processor_characteristics(void); struct cpuid_result; unsigned int smbios_processor_family(struct cpuid_result res); +unsigned int smbios_cache_error_correction_type(u8 level); +unsigned int smbios_cache_sram_type(void); +unsigned int smbios_cache_conf_operation_mode(u8 level); + /* Used by mainboard to add port information of type 8 */ struct port_information; int smbios_write_type8(unsigned long *current, int *handle, @@ -501,6 +505,13 @@ enum smbios_cache_associativity { #define SMBIOS_CACHE_SIZE2_UNIT_64KB (1UL << 31) #define SMBIOS_CACHE_SIZE2_MASK 0x7fffffff +/* define for cache operation mode */ + +#define SMBIOS_CACHE_OP_MODE_WRITE_THROUGH 0 +#define SMBIOS_CACHE_OP_MODE_WRITE_BACK 1 +#define SMBIOS_CACHE_OP_MODE_VARIES_WITH_MEMORY_ADDRESS 2 +#define SMBIOS_CACHE_OP_MODE_UNKNOWN 3 + struct smbios_type7 { u8 type; u8 length; |