diff options
author | Myles Watson <mylesgw@gmail.com> | 2010-04-08 15:12:18 +0000 |
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committer | Myles Watson <mylesgw@gmail.com> | 2010-04-08 15:12:18 +0000 |
commit | 362db613a0556a102e2812c1c00e3491eafdb66f (patch) | |
tree | 67757c096c1d71f982b0475691eba185dc7a0457 /src/include | |
parent | 9b43afde3922e7c4c58dbed85df2a9ea26e11bdf (diff) |
Cosmetically make init_cpus more similar for fam10 and K8.
Remove some fam10 warnings.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5382 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/include')
-rw-r--r-- | src/include/cpu/amd/model_10xxx_msr.h | 3 | ||||
-rw-r--r-- | src/include/cpu/amd/model_fxx_rev.h | 4 |
2 files changed, 5 insertions, 2 deletions
diff --git a/src/include/cpu/amd/model_10xxx_msr.h b/src/include/cpu/amd/model_10xxx_msr.h index c885493ef0..a774125cb0 100644 --- a/src/include/cpu/amd/model_10xxx_msr.h +++ b/src/include/cpu/amd/model_10xxx_msr.h @@ -33,4 +33,7 @@ #define LOGICAL_CPUS_NUM_MSR 0xC001100d #define CPU_ID_EXT_FEATURES_MSR 0xC0011005 +msr_t rdmsr_amd(u32 index); +void wrmsr_amd(u32 index, msr_t msr); + #endif /* CPU_AMD_MODEL_10XXX_MSR_H */ diff --git a/src/include/cpu/amd/model_fxx_rev.h b/src/include/cpu/amd/model_fxx_rev.h index c2d59a62de..56381e389e 100644 --- a/src/include/cpu/amd/model_fxx_rev.h +++ b/src/include/cpu/amd/model_fxx_rev.h @@ -98,7 +98,7 @@ static inline int is_cpu_pre_f2(void) #ifdef __PRE_RAM__ //AMD_F0_SUPPORT -static int is_cpu_f0_in_bsp(int nodeid) +static inline int is_cpu_f0_in_bsp(int nodeid) { uint32_t dword; device_t dev; @@ -106,7 +106,7 @@ static int is_cpu_f0_in_bsp(int nodeid) dword = pci_read_config32(dev, 0xfc); return (dword & 0xfff00) == 0x40f00; } -static int is_cpu_pre_f2_in_bsp(int nodeid) +static inline int is_cpu_pre_f2_in_bsp(int nodeid) { uint32_t dword; device_t dev; |