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authorDavid Hendricks <dhendrix@chromium.org>2016-01-12 22:01:13 -0800
committerPatrick Georgi <pgeorgi@google.com>2016-01-22 12:59:11 +0100
commit2cd9c05dc10462c105d889cecc148b5d87ac53fb (patch)
tree4260f5d4ca654263e3932df8a854f53ed76e43a9 /src/include
parente9995f1469504a61ba548f29fb16dc32cf9a3dea (diff)
google/veyron_*: Add dual-rank 2GB Hynix module to SDRAM configs
This is a follow-up to CL:320623 to make veyron DRAM configs uniform (except for Rialto). As discussed in chrome-os-partner:43626, the mr[3] value and ODT are set diffently for Mickey, thus the .inc files for other boards have mr[3] = 1 and ODT disabled. BUG=none BRANCH=veyron TEST=compile tested for veyron Change-Id: I61798cfef779b0a3a510fd354ab53ffc63ca6c95 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 3b7cea6331bcec8aba09a204060e093d3dd732cb Original-Signed-off-by: David Hendricks <dhendrix@chromium.org> Original-Change-Id: Iacf821645a2dcceaed1c1c42e3e1b1c312b31eab Original-Reviewed-on: https://chromium-review.googlesource.com/321870 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/13109 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org>
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