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authorMarc Jones <marcj303@gmail.com>2017-05-07 16:47:36 -0600
committerMartin Roth <martinroth@google.com>2017-06-26 00:46:03 +0000
commit21cde8b83227fa324f246672b1e2d58408ea6bf8 (patch)
treeb5c0ce8fd9426def5d0e8863265840c891fb1076 /src/include
parent244848462def7075e0c812a2f71c408668cacfe4 (diff)
soc/amd/stoneyridge: Add CPU files
Copy cpu/amd/pi/00670F00 to soc/amd/stoneyridge and soc/amd/common. This is the second patch in the process of converting Stoney Ridge to soc/. Changes: - update Kconfig and Makefiles - update vendorcode/amd for new soc/ path Change-Id: I8b6b1991372c2c6a02709777a73615a86e78ac26 Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: https://review.coreboot.org/19723 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/include')
-rw-r--r--src/include/cpu/amd/car.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/include/cpu/amd/car.h b/src/include/cpu/amd/car.h
index b4fbd60f74..89f29c2486 100644
--- a/src/include/cpu/amd/car.h
+++ b/src/include/cpu/amd/car.h
@@ -10,7 +10,7 @@ void post_cache_as_ram(void);
void cache_as_ram_switch_stack(void *stacktop);
void cache_as_ram_new_stack(void);
-#if CONFIG_CPU_AMD_AGESA || CONFIG_CPU_AMD_PI
+#if CONFIG_CPU_AMD_AGESA || CONFIG_CPU_AMD_PI || CONFIG_SOC_AMD_PI
void disable_cache_as_ram(void);
#endif