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authorKeno Fischer <keno@juliacomputing.com>2019-06-07 01:55:56 -0400
committerFelix Held <felix-coreboot@felixheld.de>2019-06-07 10:08:35 +0000
commit1044ebaa06d8932564fa3ca3b0c4fbd25a63d992 (patch)
tree73f92e9fd668c4206bb1c5a314c1633ef331b02a /src/include
parent55c577717097ecd9bb5f2d67ac7ab32f28c85ade (diff)
soc/intel: Add some missing MCH PCIe IDs
These are documented in the Intel Datasheet entitled "6th Generation IntelĀ® Processor Datasheet for S-Platforms" "6th Generation IntelĀ® Processor Datasheet for H-Platforms" (Volume 2) Without them, coreboot fails to properly inform the payload of the amount of available memory. Signed-off-by: Keno Fischer <keno@juliacomputing.com> Change-Id: I5b810c6415c4aa0404e5fa318d2c8db292566b8a Reviewed-on: https://review.coreboot.org/c/coreboot/+/33286 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: ron minnich <rminnich@gmail.com> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Christian Walter <christian.walter@9elements.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/include')
-rw-r--r--src/include/device/pci_ids.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index a35e134dc9..fd90396dc0 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -3076,7 +3076,10 @@
#define PCI_DEVICE_ID_INTEL_SKL_ID_U 0x1904
#define PCI_DEVICE_ID_INTEL_SKL_ID_Y 0x190c
#define PCI_DEVICE_ID_INTEL_SKL_ID_ULX 0x1924
+#define PCI_DEVICE_ID_INTEL_SKL_ID_H_2 0x1900
#define PCI_DEVICE_ID_INTEL_SKL_ID_H 0x1910
+#define PCI_DEVICE_ID_INTEL_SKL_ID_S_2 0x190f
+#define PCI_DEVICE_ID_INTEL_SKL_ID_S_4 0x191f
#define PCI_DEVICE_ID_INTEL_KBL_ID_S 0x590f
#define PCI_DEVICE_ID_INTEL_SKL_ID_H_EM 0x1918
#define PCI_DEVICE_ID_INTEL_SKL_ID_DT 0x191f