diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2021-01-11 15:04:11 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2021-01-12 05:18:51 +0000 |
| commit | a19001bff715f36af4aa7a8d020934087b65f136 (patch) | |
| tree | 5789f1fb5553edc17c1aeb9c0e5c84a9483445d8 /src/include | |
| parent | 1b7f63ff8a1041ebb32bfa6d0c19e614a76977b4 (diff) | |
soc/intel/alderlake: Add PCH ID 0x5182
TEST=Able to build and boot ADLRVP.
Change-Id: Ia331998b46abcf10e939078dea992589f09139bd
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49301
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include')
| -rw-r--r-- | src/include/device/pci_ids.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 8ac29c5436..0b78c9f9e9 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -2959,6 +2959,7 @@ #define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_30 0x7a1e #define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_31 0x7a1f #define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_32 0x5181 +#define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_33 0x5182 #define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_0 0x7a80 #define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_1 0x7a81 #define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_2 0x7a82 |