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authorSubrata Banik <subrata.banik@intel.com>2020-11-11 23:07:18 +0530
committerSubrata Banik <subrata.banik@intel.com>2020-11-12 03:51:49 +0000
commit4e8a9c705398e269c6534dffc54c20f8009b3d76 (patch)
treede78e271158d95bd6be045968914a3dfa5fa5c9c /src/include
parent2b5bdaea630ecd35e22473816cd4000dd8f8916e (diff)
soc/intel/alderlake: Add PCH ID 0x5181
List of changes: 1. Add new PCH ID 0x5181 into device/pci_ids.h 2. Update new PCH ID into common lpc.c 3. Add new PCH ID description into report_platform.c TEST=Able to build and boot ADLRVP with new PCH ID. Change-Id: I4343b7343876eb40c2955f6f4dd99d6446852dc0 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47474 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include')
-rw-r--r--src/include/device/pci_ids.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index 36c5dc6d03..675acc4a1b 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -2926,6 +2926,7 @@
#define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_29 0x7a1d
#define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_30 0x7a1e
#define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_31 0x7a1f
+#define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_32 0x5181
#define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_0 0x7a80
#define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_1 0x7a81
#define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_2 0x7a82