diff options
| author | Patrick Rudolph <siro@das-labor.org> | 2018-10-01 19:17:11 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-10-22 08:35:32 +0000 |
| commit | f677d17ab3cfd1471c0f238a0d32b0d56dd8d37f (patch) | |
| tree | 9b0c01512de536210262110ac4e7dfb78d6849c1 /src/include | |
| parent | 45022ae056cdbf58429b77daf2da176306312801 (diff) | |
intel: Use CF9 reset (part 2)
Make use of the common CF9 reset in SOC_INTEL_COMMON_RESET. Also
implement board_reset() as a "full reset" (aka. cold reset) as that
is what was used here for hard_reset().
Drop soc_reset_prepare() thereby, as it was only used for APL. Also,
move the global-reset logic.
We leave some comments to remind us that a system_reset() should
be enough, where a full_reset() is called now (to retain current
behaviour) and looks suspicious.
Note, as no global_reset() is implemented for Denverton-NS, we halt
there now instead of issuing a non-global reset. This seems safer;
a non-global reset might result in a reset loop.
Change-Id: I5e7025c3c9ea6ded18e72037412b60a1df31bd53
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/29169
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/include')
| -rw-r--r-- | src/include/cpu/intel/reset.h | 26 | ||||
| -rw-r--r-- | src/include/reset.h | 14 |
2 files changed, 0 insertions, 40 deletions
diff --git a/src/include/cpu/intel/reset.h b/src/include/cpu/intel/reset.h deleted file mode 100644 index 9cf6168a7c..0000000000 --- a/src/include/cpu/intel/reset.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2017 Intel Corp. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef CPU_INTEL_RESET_H -#define CPU_INTEL_RESET_H - -/* Reset control port */ -#define RST_CNT 0xcf9 -#define FULL_RST (1 << 3) -#define RST_CPU (1 << 2) -#define SYS_RST (1 << 1) - -#endif /* CPU_INTEL_RESET_H */ diff --git a/src/include/reset.h b/src/include/reset.h index fe6328d2d9..3eec193c84 100644 --- a/src/include/reset.h +++ b/src/include/reset.h @@ -39,8 +39,6 @@ __noreturn void board_reset(void); */ void do_board_reset(void); -/* Super-hard reset specific to some Intel SoCs. */ -__noreturn void global_reset(void); /* Full board reset. Resets SoC and most/all board components (e.g. DRAM). */ __noreturn void hard_reset(void); /* Board reset. Resets SoC some board components (e.g. TPM but not DRAM). */ @@ -48,19 +46,7 @@ __noreturn void soft_reset(void); /* Reset implementations. Implement these in SoC or mainboard code. Implement at least hard_reset() if possible, others fall back to it if necessary. */ -void do_global_reset(void); void do_hard_reset(void); void do_soft_reset(void); -enum reset_type { /* listed in order of softness */ - GLOBAL_RESET, - HARD_RESET, - SOFT_RESET, -}; - -/* Callback that an SoC may override to perform special actions before reset. - Take into account that softer resets may fall back to harder resets if not - implemented... this will *not* trigger another callback! */ -void soc_reset_prepare(enum reset_type reset_type); - #endif |