src/include: Drop unneeded empty lines

Change-Id: Ie325541547ea10946f41a8f979d144a06a7e80eb
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44611
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>

27 files changed, 0 insertions, 39 deletions

diff --git a/src/include/console/flash.h b/src/include/console/flash.h
index 8104e5c485..9a0dc63915 100644
--- a/src/include/console/flash.h
+++ b/src/include/console/flash.h
@@ -27,5 +27,4 @@ static inline void __flashconsole_tx_byte(u8 data)	{}
 static inline void __flashconsole_tx_flush(void)	{}
 #endif /* __CONSOLE_FLASH_ENABLE__ */
 
-
 #endif /* CONSOLE_FLASH_H */
diff --git a/src/include/console/spi.h b/src/include/console/spi.h
index cb32d7e64c..8a58b85b22 100644
--- a/src/include/console/spi.h
+++ b/src/include/console/spi.h
@@ -52,6 +52,4 @@ struct em100_msg {
 	char data[MAX_MSG_LENGTH];
 } __packed;
 
-
-
 #endif /* CONSOLE_SPI_H */
diff --git a/src/include/cpu/intel/em64t100_save_state.h b/src/include/cpu/intel/em64t100_save_state.h
index 8596ce519d..b656a284b3 100644
--- a/src/include/cpu/intel/em64t100_save_state.h
+++ b/src/include/cpu/intel/em64t100_save_state.h
@@ -66,7 +66,6 @@ typedef struct {
 	u64	rsi;
 	u64	rdi;
 
-
 	u64	io_mem_addr;
 	u32	io_misc_info;
 
diff --git a/src/include/cpu/intel/em64t101_save_state.h b/src/include/cpu/intel/em64t101_save_state.h
index 2e4e0d5748..6884b285b5 100644
--- a/src/include/cpu/intel/em64t101_save_state.h
+++ b/src/include/cpu/intel/em64t101_save_state.h
@@ -6,7 +6,6 @@
 #include <types.h>
 #include <cpu/x86/smm.h>
 
-
 /* Intel Revision 30101 SMM State-Save Area
  * The following processor architectures use this:
  * - Westmere
@@ -83,7 +82,6 @@ typedef struct {
 	u64	rsi;
 	u64	rdi;
 
-
 	u64	io_mem_addr;
 	u32	io_misc_info;
 
diff --git a/src/include/cpu/intel/smm_reloc.h b/src/include/cpu/intel/smm_reloc.h
index 07fe0381a1..126aa2a4e2 100644
--- a/src/include/cpu/intel/smm_reloc.h
+++ b/src/include/cpu/intel/smm_reloc.h
@@ -51,7 +51,6 @@ void smm_relocation_handler(int cpu, uintptr_t curr_smbase, uintptr_t staggered_
 
 bool cpu_has_alternative_smrr(void);
 
-
 #define MSR_PRMRR_PHYS_BASE 0x1f4
 #define MSR_PRMRR_PHYS_MASK 0x1f5
 #define MSR_UNCORE_PRMRR_PHYS_BASE 0x2f4
diff --git a/src/include/cpu/intel/speedstep.h b/src/include/cpu/intel/speedstep.h
index d66b8e2a7e..e085e34230 100644
--- a/src/include/cpu/intel/speedstep.h
+++ b/src/include/cpu/intel/speedstep.h
@@ -18,7 +18,6 @@
  */
 #define PMB1_BASE 0x800
 
-
 /* Speedstep related MSRs */
 #define MSR_THERM2_CTL		0x19D
 #define MSR_EBC_FREQUENCY_ID	0x2c
diff --git a/src/include/cpu/x86/msr.h b/src/include/cpu/x86/msr.h
index 1573eeff7f..3deb133240 100644
--- a/src/include/cpu/x86/msr.h
+++ b/src/include/cpu/x86/msr.h
@@ -299,7 +299,6 @@ static inline enum mca_err_code_types mca_err_type(msr_t reg)
 	return MCA_ERRTYPE_UNKNOWN;
 }
 
-
 /* Helper for setting single MSR bits */
 static inline void msr_set_bit(unsigned int reg, unsigned int bit)
 {
@@ -318,6 +317,5 @@ static inline void msr_set_bit(unsigned int reg, unsigned int bit)
 	wrmsr(reg, msr);
 }
 
-
 #endif /* __ASSEMBLER__ */
 #endif /* CPU_X86_MSR_H */
diff --git a/src/include/cpu/x86/mtrr.h b/src/include/cpu/x86/mtrr.h
index 6e30199c5f..3bf8301cfd 100644
--- a/src/include/cpu/x86/mtrr.h
+++ b/src/include/cpu/x86/mtrr.h
@@ -27,7 +27,6 @@
 #define MTRR_DEF_TYPE_EN		(1 << 11)
 #define MTRR_DEF_TYPE_FIX_EN		(1 << 10)
 
-
 #define IA32_SMRR_PHYS_BASE		0x1f2
 #define IA32_SMRR_PHYS_MASK		0x1f3
 #define SMRR_PHYS_MASK_LOCK		(1 << 10)
diff --git a/src/include/cpu/x86/post_code.h b/src/include/cpu/x86/post_code.h
index fce39b774d..077f964335 100644
--- a/src/include/cpu/x86/post_code.h
+++ b/src/include/cpu/x86/post_code.h
@@ -3,7 +3,6 @@
 
 #include <console/post_codes.h>
 
-
 #if CONFIG(POST_IO)
 #define post_code(value)        \
 	movb    $value, %al;    \
diff --git a/src/include/device/dram/ddr3.h b/src/include/device/dram/ddr3.h
index 74e0ff55f1..0814990eb9 100644
--- a/src/include/device/dram/ddr3.h
+++ b/src/include/device/dram/ddr3.h
@@ -19,7 +19,6 @@
 #include <device/dram/common.h>
 #include <types.h>
 
-
 /**
  * Convenience definitions for SPD offsets
  *
diff --git a/src/include/device/dram/ddr4.h b/src/include/device/dram/ddr4.h
index f258fa9f09..d22d4bc500 100644
--- a/src/include/device/dram/ddr4.h
+++ b/src/include/device/dram/ddr4.h
@@ -21,7 +21,6 @@
 #define SPD_DDR4_PART_OFF	329
 #define SPD_DDR4_PART_LEN	20
 
-
 /*
  * Module type (byte 3, bits 3:0) of SPD
  * This definition is specific to DDR4. DDR2/3 SPDs have a different structure.
diff --git a/src/include/device/hypertransport_def.h b/src/include/device/hypertransport_def.h
index a0b1a36a21..3cbd90b39c 100644
--- a/src/include/device/hypertransport_def.h
+++ b/src/include/device/hypertransport_def.h
@@ -18,7 +18,6 @@
 #define HT_FREQ_2600Mhz 14
 #define HT_FREQ_VENDOR  15  /* AMD defines this to be 100Mhz */
 
-
 static inline bool offset_unit_id(bool is_sb_ht_chain)
 {
 	bool need_offset = (CONFIG_HT_CHAIN_UNITID_BASE != 1)
diff --git a/src/include/device/path.h b/src/include/device/path.h
index 4db83b7b3f..5690badc4c 100644
--- a/src/include/device/path.h
+++ b/src/include/device/path.h
@@ -137,7 +137,6 @@ struct device_path {
 	};
 };
 
-
 #define DEVICE_PATH_MAX 40
 #define BUS_PATH_MAX (DEVICE_PATH_MAX+10)
 
diff --git a/src/include/device/pci_def.h b/src/include/device/pci_def.h
index 25372bf51f..e0d891eeb9 100644
--- a/src/include/device/pci_def.h
+++ b/src/include/device/pci_def.h
@@ -305,7 +305,6 @@
 #define  PCI_MSIX_PBA_OFFSET	~0x7	/* Offset into specified BAR */
 #define PCI_CAP_MSIX_SIZEOF	12	/* size of MSIX registers */
 
-
 /* CompactPCI Hotswap Register */
 
 #define PCI_CHSWP_CSR		2	/* Control and Status Register */
@@ -521,7 +520,6 @@
 #define PCI_PWR_CAP		12	/* Capability */
 #define  PCI_PWR_CAP_BUDGET(x)	((x) & 1)	/* Included in system budget */
 
-
 /*
  * The PCI interface treats multi-function devices as independent
  * devices.  The slot/function address of each device is encoded
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index cbb1975618..944c20eb83 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -517,7 +517,6 @@
 #define PCI_DEVICE_ID_NS_SCx200_XBUS	0x0505
 #define PCI_DEVICE_ID_NS_87410		0xd001
 
-
 #define PCI_VENDOR_ID_TSENG		0x100c
 #define PCI_DEVICE_ID_TSENG_W32P_2	0x3202
 #define PCI_DEVICE_ID_TSENG_W32P_b	0x3205
@@ -1664,7 +1663,6 @@
 #define PCI_DEVICE_ID_ATT_L56XMF	0x0440
 #define PCI_DEVICE_ID_ATT_VENUS_MODEM	0x480
 
-
 #define PCI_VENDOR_ID_SPECIALIX		0x11cb
 #define PCI_DEVICE_ID_SPECIALIX_IO8	0x2000
 #define PCI_DEVICE_ID_SPECIALIX_XIO	0x4000
diff --git a/src/include/device/pci_mmio_cfg.h b/src/include/device/pci_mmio_cfg.h
index d3666c241d..234ebb4c2c 100644
--- a/src/include/device/pci_mmio_cfg.h
+++ b/src/include/device/pci_mmio_cfg.h
@@ -7,7 +7,6 @@
 #include <device/mmio.h>
 #include <device/pci_type.h>
 
-
 /* By not assigning this to CONFIG_MMCONF_BASE_ADDRESS here we
  * prevent some sub-optimal constant folding. */
 extern u8 *const pci_mmconf;
diff --git a/src/include/device/pnp.h b/src/include/device/pnp.h
index 800bcc0557..7340bbfe9c 100644
--- a/src/include/device/pnp.h
+++ b/src/include/device/pnp.h
@@ -67,7 +67,6 @@ struct resource *pnp_get_resource(struct device *dev, unsigned int index);
 void pnp_enable_devices(struct device *dev, struct device_operations *ops,
 			unsigned int functions, struct pnp_info *info);
 
-
 struct pnp_mode_ops {
 	void (*enter_conf_mode)(struct device *dev);
 	void (*exit_conf_mode)(struct device *dev);
diff --git a/src/include/device/resource.h b/src/include/device/resource.h
index 42c7e6ae45..3a7ccf09e6 100644
--- a/src/include/device/resource.h
+++ b/src/include/device/resource.h
@@ -109,7 +109,6 @@ static inline void *res2mmio(struct resource *res, unsigned long offset,
 const struct device *largest_resource(struct bus *bus, struct resource **result_res,
 				      unsigned long type_mask, unsigned long type);
 
-
 /* Compute and allocate resources. This is the main resource allocator entry point. */
 void allocate_resources(const struct device *root);
 
diff --git a/src/include/device_tree.h b/src/include/device_tree.h
index b70f5aadbd..ae30c59710 100644
--- a/src/include/device_tree.h
+++ b/src/include/device_tree.h
@@ -43,8 +43,6 @@ struct fdt_property
 	uint32_t size;
 };
 
-
-
 /*
  * Unflattened device tree structures.
  */
@@ -88,8 +86,6 @@ struct device_tree
 	struct device_tree_node *root;
 };
 
-
-
 /*
  * Flattened device tree functions. These generally return the number of bytes
  * which were consumed reading the requested value.
@@ -109,8 +105,6 @@ int fdt_skip_node(const void *blob, uint32_t offset);
    invalidates the unflattened one. */
 struct device_tree *fdt_unflatten(const void *blob);
 
-
-
 /*
  * Unflattened device tree functions.
  */
diff --git a/src/include/elog.h b/src/include/elog.h
index c41887a00b..8c50e00ba5 100644
--- a/src/include/elog.h
+++ b/src/include/elog.h
@@ -202,7 +202,6 @@ struct elog_event_mem_cache_update {
 #define ELOG_TYPE_MI_HRPC                 0xb4
 #define ELOG_TYPE_MI_HR                   0xb5
 
-
 struct elog_event_extended_event {
 	u8 event_type;
 	u32 event_complement;
diff --git a/src/include/input-event-codes.h b/src/include/input-event-codes.h
index 006c2627ad..abb1e08a5b 100644
--- a/src/include/input-event-codes.h
+++ b/src/include/input-event-codes.h
@@ -870,7 +870,6 @@
 #define ABS_MT_TOOL_X		0x3c	/* Center X tool position */
 #define ABS_MT_TOOL_Y		0x3d	/* Center Y tool position */
 
-
 #define ABS_MAX			0x3f
 #define ABS_CNT			(ABS_MAX+1)
 
diff --git a/src/include/memrange.h b/src/include/memrange.h
index 72cfa726eb..80db5985ed 100644
--- a/src/include/memrange.h
+++ b/src/include/memrange.h
@@ -82,7 +82,6 @@ static inline bool memranges_is_empty(const struct memranges *ranges)
 #define memranges_each_entry(r, ranges) \
 	for (r = (ranges)->entries; r != NULL; r = r->next)
 
-
 /* Initialize memranges structure providing an optional array of range_entry
  * to use as the free list. Additionally, it accepts an align parameter that
  * represents the required alignment(log 2) of addresses. */
diff --git a/src/include/nhlt.h b/src/include/nhlt.h
index 30cb274874..335580144c 100644
--- a/src/include/nhlt.h
+++ b/src/include/nhlt.h
@@ -219,7 +219,6 @@ enum {
 	SPEAKER_TOP_BACK_RIGHT = 1 << 17,
 };
 
-
 /* Supporting structures. Only SoC/chipset and the library code directly should
  * be manipulating these structures. */
 struct sub_format {
diff --git a/src/include/pc80/mc146818rtc.h b/src/include/pc80/mc146818rtc.h
index a2c65cb4c0..2f94cc0213 100644
--- a/src/include/pc80/mc146818rtc.h
+++ b/src/include/pc80/mc146818rtc.h
@@ -17,7 +17,6 @@
 #define RTC_REG_C		12
 #define RTC_REG_D		13
 
-
 /**********************************************************************
  * register details
  **********************************************************************/
diff --git a/src/include/reg_script.h b/src/include/reg_script.h
index 59da0cb2ed..aa6bf80fa5 100644
--- a/src/include/reg_script.h
+++ b/src/include/reg_script.h
@@ -355,7 +355,6 @@ struct reg_script_bus_entry {
 #define REG_RES_XOR32(bar_, reg_, value_) \
 	REG_RES_RXW32(bar_, reg_, 0xffffffff, value_)
 
-
 #if CONFIG(SOC_INTEL_BAYTRAIL)
 /*
  * IO Sideband Function
diff --git a/src/include/smp/atomic.h b/src/include/smp/atomic.h
index ed70cb7baa..5e78ae4462 100644
--- a/src/include/smp/atomic.h
+++ b/src/include/smp/atomic.h
@@ -31,7 +31,6 @@ typedef struct { int counter; } atomic_t;
  */
 #define atomic_set(v, i)	(((v)->counter) = (i))
 
-
 /**
  * atomic_inc - increment atomic variable
  * @param v: pointer of type atomic_t
@@ -41,7 +40,6 @@ typedef struct { int counter; } atomic_t;
  */
 #define atomic_inc(v)	(((v)->counter)++)
 
-
 /**
  * atomic_dec - decrement atomic variable
  * @param v: pointer of type atomic_t
@@ -51,7 +49,6 @@ typedef struct { int counter; } atomic_t;
  */
 #define atomic_dec(v)	(((v)->counter)--)
 
-
 #endif /* CONFIG_SMP */
 
 #endif /* SMP_ATOMIC_H */
diff --git a/src/include/spd.h b/src/include/spd.h
index f46bde6522..9afb706c97 100644
--- a/src/include/spd.h
+++ b/src/include/spd.h
@@ -136,7 +136,6 @@
 /* SDRAM Device Minimum Auto Refresh to Active/Auto Refresh (tRFC) */
 #define SPD_tRFC			    42
 
-
 /* SPD_MEMORY_TYPE values. */
 enum spd_memory_type {
 	SPD_MEMORY_TYPE_UNDEFINED		= 0x00,