diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2016-05-09 16:09:25 -0700 |
|---|---|---|
| committer | Duncan Laurie <dlaurie@google.com> | 2016-05-21 06:01:34 +0200 |
| commit | 3a39f44fc42cf02be898279036ebf066d4f72caf (patch) | |
| tree | 5006dff05949d997d5817ae3171bb4fe12ba5151 /src/include | |
| parent | 2f6fb9f5f9b972fc1f19cc743e9d75ede15e5f02 (diff) | |
gpio: Add a function to map GPIO to ACPI path
Add a new function "gpio_acpi_path()" that can be implemented by
SoC/board code to provide a mapping from a "gpio_t" pin to a
controller by returning the ACPI path for the controller that owns
this particular GPIO.
This is implemented separately from the "acpi_name" handler as many
SOCs do not have a specific device that handles GPIOs (or may have
many devices and the only way to know which is the opaque gpio_t)
and the current GPIO library does not have any association with the
device tree.
If not implemented (many SoCs do not implement the GPIO library
abstraction at all in coreboot) then the default handler will return
NULL and the caller knows it cannot determine this reliably.
Change-Id: Iaa0ff6c8c058f00cddf0909c4b7405a0660d4cfb
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/14842
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/include')
| -rw-r--r-- | src/include/gpio.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/src/include/gpio.h b/src/include/gpio.h index 4627e4412c..3f462df295 100644 --- a/src/include/gpio.h +++ b/src/include/gpio.h @@ -32,6 +32,15 @@ void gpio_output(gpio_t gpio, int value); int _gpio_base3_value(gpio_t gpio[], int num_gpio, int binary_first); /* + * This function may be implemented by SoC/board code to provide + * a mapping from a GPIO pin to controller by returning the ACPI + * path for the controller that owns this GPIO. + * + * If not implemented the default handler will return NULL. + */ +const char *gpio_acpi_path(gpio_t gpio); + +/* * Read the value presented by the set of GPIOs, when each pin is interpreted * as a base-2 digit (LOW = 0, HIGH = 1). * |