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authorMusse Abdullahi <musse.abdullahi@intel.com>2023-04-10 18:07:14 -0700
committerSubrata Banik <subratabanik@google.com>2023-04-15 12:10:08 +0000
commitab496bf1770b4b2a1b0f6a99e14e736c43190b44 (patch)
tree238334809b2e94af391df572f98b77427e10c32c /src/include
parent71fd3becf0f6aafa1b17495233129b06893402b1 (diff)
soc/intel/meteorlake: Add B0 stepping CPU ID
This patch adds CPU ID for B0 stepping (aka ES2). DOC=#723567 TEST=Able to boot on B0 rvp and get correct CPU Name in coreboot log. Signed-off-by: Musse Abdullahi <musse.abdullahi@intel.com> Change-Id: I8b939ccc8b05e3648c55f8f2a0a391cb08f04184 Signed-off-by: Musse Abdullahi <musse.abdullahi@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74300 Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Kapil Porwal <kapilporwal@google.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include')
-rw-r--r--src/include/cpu/intel/cpu_ids.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/include/cpu/intel/cpu_ids.h b/src/include/cpu/intel/cpu_ids.h
index 7caafd5886..2d64c5f271 100644
--- a/src/include/cpu/intel/cpu_ids.h
+++ b/src/include/cpu/intel/cpu_ids.h
@@ -71,6 +71,7 @@
#define CPUID_ALDERLAKE_N_A0 0xb06e0
#define CPUID_METEORLAKE_A0_1 0xa06a0
#define CPUID_METEORLAKE_A0_2 0xa06a1
+#define CPUID_METEORLAKE_B0 0xa06a2
#define CPUID_RAPTORLAKE_P_J0 0xb06a2
#define CPUID_RAPTORLAKE_P_Q0 0xb06a3