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authorSubrata Banik <subratabanik@google.com>2022-09-14 18:15:20 -0700
committerSubrata Banik <subratabanik@google.com>2022-09-16 05:37:05 +0000
commita3acac15eea01ef82b9fddb68d8df5b606185610 (patch)
treebdb38acceb4824c11120d418779476865c2dc538 /src/include
parent00b682e6a4166e01520f38728b6f31b79cb06c99 (diff)
Revert "drivers/wifi: Move MTL Magnetar CNVi DIDs from SoC to generic driver"
This reverts commit 510a55d4eeaeb32047c17328ef238b55b89e7296. Reason for revert: Observed `missing read resource` issue for cnvi device BUG=b:244687646 TEST=No error seen in AP log while booting Google/rex Without this patch: [SPEW ] PCI: 00:14.3 read_resources bus 0 link: 0 [ERROR] GENERIC: 0.0 missing read_resources [SPEW ] PCI: 00:14.3 read_resources bus 0 link: 0 done With this patch: [SPEW ] PCI: 00:14.3 read_resources bus 0 link: 0 [SPEW ] PCI: 00:14.3 read_resources bus 0 link: 0 done Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: I1e881313729f1088cffa7c161722ee79bb9acc49 Reviewed-on: https://review.coreboot.org/c/coreboot/+/67566 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Tarun Tuli <taruntuli@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com>
Diffstat (limited to 'src/include')
-rw-r--r--src/include/device/pci_ids.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index 146d749b3f..434449ccba 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -4431,10 +4431,6 @@
#define PCI_DID_GrP_6SERIES_1_WIFI 0x51f0
#define PCI_DID_GrP_6SERIES_2_WIFI 0x7af0
#define PCI_DID_GrP_6SERIES_3_WIFI 0x51f1
-#define PCI_DID_TyP2_6SERIES_1_WIFI 0x7e40
-#define PCI_DID_TyP2_6SERIES_2_WIFI 0x7e41
-#define PCI_DID_TyP2_6SERIES_3_WIFI 0x7e42
-#define PCI_DID_TyP2_6SERIES_4_WIFI 0x7e43
#define PCI_DID_INTEL_TGL_IPU 0x9a19
#define PCI_DID_INTEL_TGL_H_IPU 0x9a39
@@ -4482,6 +4478,10 @@
#define PCI_DID_INTEL_ADL_N_CNVI_WIFI_1 0x54f1
#define PCI_DID_INTEL_ADL_N_CNVI_WIFI_2 0x54f2
#define PCI_DID_INTEL_ADL_N_CNVI_WIFI_3 0x54f3
+#define PCI_DID_INTEL_MTL_CNVI_WIFI_0 0x7e40
+#define PCI_DID_INTEL_MTL_CNVI_WIFI_1 0x7e41
+#define PCI_DID_INTEL_MTL_CNVI_WIFI_2 0x7e42
+#define PCI_DID_INTEL_MTL_CNVI_WIFI_3 0x7e43
/* Intel Crashlog */
#define PCI_DID_INTEL_TGL_CPU_CRASHLOG_SRAM 0x9a0d