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authorAngel Pons <th3fanbus@gmail.com>2021-03-03 16:55:01 +0100
committerPatrick Georgi <pgeorgi@google.com>2021-03-05 10:57:10 +0000
commit8af3e0eb426ddec222d20e1fd92600b5042ab3b4 (patch)
tree50af6f0de165d6ec0fa790d79d7fdcec25ee6935 /src/include
parentba7b90ecf216c8882d4b37579380e9a46d79e2f0 (diff)
soc/intel/broadwell/pch: Use Lynx Point smbus.c
Continue unifying Lynx Point and Wildcat Point (PCH for Broadwell) code. Define the WPT-LP SMBus PCI device ID, add it to smbus.c of Lynx Point, and drop all now-unnecessary SMBus code from Broadwell. Change-Id: I864d7c2dd47895a3c559e2f1219425cda9fd0c17 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51235 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/include')
-rw-r--r--src/include/device/pci_ids.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index d99f307bd9..b54de0bdb2 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -3911,6 +3911,7 @@
/* Intel SMBUS device Ids */
#define PCI_DEVICE_ID_INTEL_LPT_H_SMBUS 0x8c22
#define PCI_DEVICE_ID_INTEL_LPT_LP_SMBUS 0x9c22
+#define PCI_DEVICE_ID_INTEL_WPT_LP_SMBUS 0x9ca2
#define PCI_DEVICE_ID_INTEL_APL_SMBUS 0x5ad4
#define PCI_DEVICE_ID_INTEL_SPT_LP_SMBUS 0x9d23
#define PCI_DEVICE_ID_INTEL_SPT_H_SMBUS 0xa123